
T IME R A
7751 Group User’s Manual
5–36
5.5 One-shot pulse mode
5.5.4 Operation in one-shot pulse mode
When the one-shot pulse mode is selected with the operating mode select bits, the TAi
OUT
pin outputs
“L” level.
When the count start bit is set to “1,” the counter is enabled for counting. After that, counting starts when
a trigger is generated.
When the counter starts counting, the TAi
OUT
pin outputs “H” level. (However, if the timer Ai register has
a value “0000
16
” set in it, the counter does not operate and the output from the TAi
OUT
pin remains “L.”
The timer Ai interrupt request does not occur.)
When the counter value becomes “0000
16
,” the output from the TAi
OUT
pin becomes “L” level. Additionally,
the reload register’s contents are reloaded and the counter stops counting there.
Simultaneously at
, the timer Ai interrupt request bit is set to “1.”
This interrupt request bit remains set to “1” until the interrupt request is accepted or the interrupt request
bit is cleared to “0” by software.
Figure 5.5.5 shows an example of operation in the one-shot pulse mode.
When a trigger is generated after
above, the counter and TAi
OUT
pin perform the same operations
beginning from
again. Furthermore, if a trigger is generated during counting, the counter down-counts
once after this generated new trigger, and it continues counting with the reload register’s contents reloaded.
If generating a trigger during counting, make sure that a certain time which is equivalent to one cycle of
the timer’s count source or more has passed between the previous generated trigger and a new generated
trigger.
The one-shot pulse output from the TAi
OUT
pin can be disabled by clearing the timer Ai mode register’s bit
2 to “0.” Accordingly, timer Ai can be also used as an internal one-shot timer that does not perform the
pulse output. In this case, the TAi
OUT
pin functions as a programmable I/O port.