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參數(shù)資料
| 型號(hào)： | 74HC7404N |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | FIFO |
| 英文描述： | 5-Bit x 64-word FIFO register; 3-state |
| 中文描述： | 64 X 5 OTHER FIFO, 98 ns, PDIP18 |
| 封裝： | PLASTIC, DIP-18 |
| 文件頁數(shù)： | 17/28頁 |
| 文件大小： | 131K |
| 代理商： | 74HC7404N |
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September 1993
17
Philips Semiconductors
Product specification
5-Bit x 64-word FIFO register; 3-state
74HC/HCT7404
Shift-in operation; high-speed burst mode
Note to
Fig.12
In the high-speed mode, the burst-in rate is determined by the minimum shift-in HIGH and shift-in LOW specifications.
The DIR status flag is a don't care condition, and a shift-in pulse can be applied regardless of the flag. A SI pulse which
would overflow the storage capacity of the FIFO is ignored.
Fig.12 Waveforms showing SI minimum pulse width and maximum pulse frequency, in high-speed shift-in burst
mode.
handbook, full pagewidth
MGA662
VM
(1)
SI INPUT
Dn INPUT
1/
fmax
tW
DIR OUTPUT
(1) HC
:
V
M
= 50%; V
I
= GND to V
.
V
M
= 1.3 V; V
I
= GND to 3 V.
HCT :
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