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參數(shù)資料
| 型號(hào)： | 74F50729 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics |
| 中文描述： | 同步雙D型觸發(fā)器具有邊觸發(fā)器觸發(fā)并以穩(wěn)免疫特色復(fù)位 |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | 74F50729 |
Philips Semiconductors
Product specification
74F50729
Synchronizing dual D-type flip-flop with edge-triggered
set and reset and metastable immune characteristics
1990 Sep 14
3
LOGIC SYMBOL
D1
D0
Q0 Q0 Q1 Q1
5
6
9
8
2
12
V
= Pin 14
GND = Pin 7
CP0
SD0
RD0
CP1
SD1
RD1
3
4
1
11
10
13
SF00612
IEC/IEEE SYMBOL
4
3
2
1
10
11
12
13
3
6
9
8
&
S
S
C1
C2
1D
2D
R
R
SF00613
METASTABLE IMMUNE CHARACTERISTICS
Philips Semiconductors uses the term ‘metastable immune’ to
describe characteristics of some of the products in its family.
Specifically the 74F50XXX family presently consist of 4 products
which will not glitch or display metastable immune characteristics.
This term means that the outputs will not glitch or display an output
anomaly under any circumstances including setup and hold time
violations. This claim is easily verified on the 74F5074. By running
two independent signal generators (see Fig. 1) at nearly the same
frequency (in this case 10MHz clock and 10.02 MHz data) the
device–under–test can be often be driven into metastable state. If
the Q output is then used to trigger a digital scope set to infinite
persistence the Q output will build a waveform. An experiment was
run by continuously operating the devices in the region where
metastability will occur.
When the device–under–test is a 74F74 (which was not designed
with metastable immune characteristics) the waveform will appear
as in Fig. 2.
Figure 2 shows clearly that the Q output can vary in time with
respect to the Q trigger point. This also implies that the Q or Q
output waveshapes may be distorted. This can be verified on an
analog scope with a charge plate CRT. Perhaps of even greater
interest are the dots running along the 3.5V volt line in the upper
right hand quadrant. These show that the Q output did not change
state even though the Q output glitched to at least 1.5 volt, the
trigger point of the scope.
When the device–under–test is a metastable immune part, such as
the 74F5074, the waveform will appear as in Fig. 3. The 74F5074 Q
output will appear as in Fig. 3. The 74F5074 Q output will not vary
with respect to the Q trigger point even when the a part is driven into
a metastable state. Any tendency towards internal metastability is
resolved by Philips Semiconductors patented circuitry. If a
metastable event occurs within the flop the only outward
manifestation of the event will be an increased clock–to–Q/Q
propagation delay. This propagation delay is, of course, a function of
the metastability characteristics of the part defined by
τ
and T
0.
The metastability characteristics of the 74F5074 and related part
types represent state–of–the–art TTL technology.
After determining the T
0
and t of the flop, calculating the mean time
between failures (MTBF) is simple. Suppose a designer wants to
use the 74F50729 for synchronizing asynchronous data that is
arriving at 10MHz (as measured by a frequency counter), has a
clock frequency of 50MHz, and has decided that he would like to
sample the output of the 74F50729 10 nanoseconds after the clock
edge. He simply plugs his number into the equation below:
MTBF = e
(t’/t)
/ T
o
f
C
f
I
In this formula, f
C
is the frequency of the clock, f
I
is the average
input event frequency, and t’ is the time after the clock pulse that the
output is sampled (t’ < h, h being the normal propagation delay). In
this situation the f
I
will be twice the data frequency of 20 MHz
because input events consist of both of low and high transitions.
Multiplying f
I
by f
C
gives an answer of 10
15
Hz
2
. From Fig. 3. it is
clear that the MTBF is greater than 10
10
seconds. Using the above
formula the actual MTBF is 1.51 X 10
10
seconds or about 480 years.
D
Q
Q
CP
TRIGGER
DIGITAL
SCOPE
INPUT
SIGNAL GENERATOR
SF00586
SIGNAL GENERATOR
Figure 1. Test Setup
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| 74F5074 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Synchronizing dual D-type flip-flop/clock driver |
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| 74F51 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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