參數(shù)資料
型號(hào): 74F51SCX
英文描述: 2/2-input and 3/3-input AND-NOR Gate
中文描述: 2/2-input和3/3-input和-或非門
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 64K
代理商: 74F51SCX
2000 Fairchild Semiconductor Corporation
DS009468
www.fairchildsemi.com
April 1988
Revised September 2000
7
74F51
Dual 2-Wide 2-Input; 2-Wide 3-Input AND-OR-Invert Gate
General Description
This device contains two independent logic units, one per-
forming a 2-2 AND-OR-INVERT and the other performing a
3-3 AND-OR-INVERT function.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
Function Table for 3-Input Gates
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Function Table for 2-Input Gates
X
=
Immaterial
Order Number
74F51SC
74F51SJ
74F51PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
U.L.
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
1.0/1.0
20
μ
A/
0.6 mA
50/33.3
1 mA/20 mA
A
n
, B
n
, C
n
, D
n
, E
n
, F
n
O
n
Inputs
Outputs
Inputs
Output
A
0
H
X
B
0
H
X
C
0
H
X
D
0
X
H
E
0
X
H
F
0
X
H
O
0
L
L
H
All other combinations
Inputs
Output
A
1
H
X
B
1
H
X
C
1
X
H
D
1
X
H
O
1
L
L
H
All other combinations
相關(guān)PDF資料
PDF描述
74F51SJX 2/2-input and 3/3-input AND-NOR Gate
74F51 Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate(雙2位寬,2輸入,2方式 ,3輸入與或非門)
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