參數(shù)資料
型號： 73S1210F-68MR/F/PH
廠商： Maxim Integrated
文件頁數(shù)： 89/126頁
文件大?。?/td> 0K
描述： IC SOC SMART CARD READER 68QFN
標(biāo)準(zhǔn)包裝： 2,500
系列： *
DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
65
Keypad Scan Time Register (KSCAN): 0xD3
0x00
This register contains the values of scanning time and debouncing time.
Table 66: The KSCAN Register
MSB
LSB
DBTIME.5
DBTIME.4 DBTIME.3 DBTIME.2 DBTIME.1 DBTIME.0 SCTIME.1 SCTIME.0
Bit
Symbol
Function
KSCAN.7
DBTIME.5
Debounce time in 4ms increments. 1 = 4ms de-bounce time, 0x3F =
252ms, 0x00 = 256ms. Key presses and key releases are debounced by
this amount of time.
KSCAN.6
DBTIME.4
KSCAN.5
DBTIME.3
KSCAN.4
DBTIME.2
KSCAN.3
DBTIME.1
KSCAN.2
DBTIME.0
KSCAN.1
SCTIME.1
Scan time in ms. 01 = 1ms, 02 = 2ms, 00 = 3ms, 00 = 4ms. Time between
checking each key during keypad scanning.
KSCAN.0
SCTIME.0
Keypad Control/Status Register (KSTAT): 0xD4
0x00
This register is used to control the hardware keypad scanning and detection capabilities, as well as the
keypad interrupt control and status.
Table 67: The KSTAT Register
MSB
LSB
–
KEYCLK
HWSCEN KEYDET
KYDTEN
Bit
Symbol
Function
KSTAT.7
–
KSTAT.6
–
KSTAT.5
–
KSTAT.4
–
KSTAT.3
KEYCLK
The current state of the keyboard clock can be read from this bit.
KSTAT.2
HWSCEN
Hardware Scan Enable – When set, the hardware will perform automatic
key scanning. When cleared, the firmware must perform the key scanning
manually (bypass mode).
KSTAT.1
KEYDET
Key Detect – When HWSCEN = 1, this bit is set causing an interrupt that
indicates a valid key press was detected and the key location can be read
from the Keypad Column and Row registers. When HWSCEN = 0, this bit
is an interrupt which indicates a falling edge on any Row input if all Row
inputs had been high previously (note: multiple Key Detect interrupts may
occur in this case due to the keypad switch bouncing). In all cases, this bit
is cleared when read. When HWSCEN = 0 and the keypad interface 1kHz
clock is disabled, a key press will still set this bit and cause an interrupt.
KSTAT.0
KYDTEN
Key Detect Enable – When set, the KEYDET bit can cause an interrupt and
when cleared the KEYDET cannot cause an interrupt. KEYDET can still
get set even if the interrupt is not enabled.
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