參數(shù)資料
型號： 73S1210F-68MR/F/PH
廠商： Maxim Integrated
文件頁數(shù)： 116/126頁
文件大?。?/td> 0K
描述： IC SOC SMART CARD READER 68QFN
標準包裝： 2,500
系列： *
DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
9
Pin Name
P
in
(68
Q
F
N
)
P
in
(44
Q
F
N
)
Ty
pe
Eq
u
iv
a
le
n
t
C
ir
c
u
it
*
Description
PRES
53
34
I
Smart Card presence. Active high. Note: the pin has a
very weak pull down resistor. In noisy environments, an
external pull down may be desired to insure against a
false card event.
CLK
55
36
O
Smart Card clock signal.
RST
57
38
O
Smart Card reset signal.
IO
61
42
IO
Smart Card Data IO signal.
AUX1
60
41
IO
Auxiliary Smart Card IO signal (C4).
AUX2
59
40
IO
Auxiliary Smart Card IO signal (C8).
VCC
58
39
PSO
Smart Card VCC supply voltage output. A 0.47
F
capacitor is required and should be located at the smart
card connector. The capacitor should be a ceramic type
with low ESR.
GND
56
37
GND
Smart Card Ground.
VPC
65
44
PSI
Power supply source for main voltage converter circuit. A
10
F and a 0.1F capacitor are required at the VPC input.
The 10
F capacitor should be a ceramic type with low
ESR.
VBUS
62
PSI
Alternate power source input from external power supply.
VBAT
64
PSI
Alternate power source input, typically from two series
cells, V > 4V.
VP
54
35
PSO
Intermediate output of main converter circuit. Requires an
external 4.7
F low ESR filter capacitor to GND.
LIN
66
1
PSI
Connection to 10
H inductor for internal step up
converter. Note: inductor must be rated for 400 mA
maximum peak current.
ON_OFF
63
43
I
Power control pin. Connected to normally open SPST
switch to ground. Closing switch for duration greater than
debounce period will turn 73S1210F on. If 73S1210F is
on, closing switch will flag the 73S1210F to go to the off
state. Firmware will control when the power is shut down.
OFF_REQ
52
33
O
Digital output. If ON_OFF switch is closed (to ground) for
debounce duration and circuit is “on,” OFF_REQ will go
high (Request to turn OFF). This output should be
connected to an interrupt pin to signal the CPU core that a
request to shut down power has been initiated. The
firmware can then perform all of its shut down
housekeeping duties before shutting down VDD.
TBUS(3:0)
0
1
2
3
50
46
44
41
IO
Trace bus signals for ICE.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
73S1210F-EB 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1210F-EB-Lite 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd Lite w/Doc Cd, Cable RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1210F-EB-LiteMS 功能描述:開發(fā)板和工具包 - 8051 73S1210F Eval Brd Lite + Multi Sam RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1215F 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More
73S1215F-44IM/F 功能描述:8位微控制器 -MCU 80515 SoC w/USB & PINpad RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
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