參數(shù)資料
型號: 48SD6404
廠商: Maxwell Technologies, Inc
英文描述: CAP 2.2UF 50V CERAMIC MONO 20%
中文描述: 256 MB的SDRAM的16梅格× 4位× 4,銀行
文件頁數(shù): 2/42頁
文件大?。?/td> 596K
代理商: 48SD6404
48SD6404
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All data sheets are subject to change without notice
2005 Maxwell Technologies
All rights reserved.
256Mb (16-Meg X 4-Bit X 4-Banks) SDRAM
01.11.05 Rev 2
DQM Truth Table
Note: H: V
IH L: VIL x VIH or VIL
Write: I
DID is Needed
Read: I
DOD is Needed
The SDRAM can mask input/output data by means of DQM.
During reading, the output buffer is set to Low-Z by setting DQM to Low, enabling data output. On the other
hand, when DQM is set High, the output buffer becomes High-Z, disabling data output.
During writing, data is written by setting DQM to Low. When DQM is set to High, the previous data is held (
the new data is not written). Desired data can be masked during burst read or burst write by setting DQM.
For more details, refer to the DQM control section of the SDRAM operating instructions.
COMMAND
SYMBOL
CKE = N-1
CKE = N
DQM
Nibble(DQ0 to DQ3) write enable/output
enable
MASK
H
x
L
Nibble(DQ0 to DQ3) write enable/output
enable
ENBL
H
x
H
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