- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3975 > 20-668-0003 (Rabbit Semiconductor)IC CPU RABBIT2000 30MHZ 100PQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | 20-668-0003 |
| 廠商： | Rabbit Semiconductor |
| 文件頁(yè)數(shù)： | 45/228頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CPU RABBIT2000 30MHZ 100PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 系列： | Rabbit 2000 |
| 處理器類型： | Rabbit 2000 8-位 |
| 速度： | 30MHz |
| 電壓： | 2.7V，3V，3.3V，5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-BQFP |
| 供應(yīng)商設(shè)備封裝： | 100-PQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 20-668-0003-ND 316-1062 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)當(dāng)前第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)
133
12.7.5.2 Parity, Extra Stop Bits with 8 Data Bit Characters
In order to receive parity with 8 data bits, a check is made on each character for a 9th bit
low. The 9th bit, or parity bit, is low if bit 6 of the serial port status register is set to a "1"
after the character is received. If the 9th bit is not a zero, then the serial port treats it as an
extra stop bit. So if the 9th bit low flag is not set, it should be assumed that the parity bit is
a "1."
No special precautions are necessary to receive extra stop bits, nor does the serial port
check for stop bits beyond one. If the first stop bit is missing, it is treated as a 9th (or 8th)
bit low and will be received as a 9-bit (8-bit) character.
Sending a 9th bit or an extra stop bit is easier with revisions A–C of the Rabbit 2000 chip,
which have a long stop register as described in Section B.2.3. It was more difficult to
transmit an extra stop bit or a parity bit of value "1" with the original Rabbit 2000 chip.
The difficulty arose because there is no one solution that applies to every case, although
there is a solution for every case. To send an extra stop bit or parity bit of value "1" using
the original Rabbit 2000 chip, it is necessary to delay sending the next character so that the
stop bit will be extended to a length of at least 2 baud times. In order to delay the next
character by an additional baud time, the program has to wait for the transmitter idle inter-
rupt, which takes place after the data register empty interrupt. The data register ready
interrupt request is terminated by writing to the status register. After the transmitter idle
interrupt, which takes place at the trailing edge of the stop bit, the interrupt routine must
not load the next character for another baud time, for example, 8.6 s at 115,200 bps or
104 s at 9600 bps. At the highest baud rates it makes sense to use a busy wait loop in the
interrupt routine to time out a baud step before loading the data register with the next char-
acter. The busy wait loop may be very brief since the delay can be partially made up from
the time used to save the registers on entry to the interrupt and the time used in fetching
the next character to be sent from the transmit buffer. Of course the busy wait loop runs on
the processor clock, which is subject to being throttled up and down, so the loop count
must be coordinated with the current processor speed.
A busy wait loop can still be used at slower baud rates, but then there will be a deleterious
effect on the interrupt latency unless interrupts are re-enabled in the interrupt routine. This
can certainly be done provided that the receiver and transmitter interrupts are properly dis-
patched to separate routines because the receiver and transmitter interrupts share the same
interrupt vector. In addition, when interrupts are re-enabled in the interrupt routine, there
must be coordination with the real-time kernel or the operating system (if there is one).
This coordination typically involves a nesting count of interrupt routines that much be
adjusted by each interrupt routine that re-enables interrupts before it returns. If a busy wait
loop is used, it can be expected to consume around 10% of the processors compute time
while characters are being transmitted, since it is doing busy waiting for 1 baud out of 11
baud times for each character sent. Using the transmitter idle interrupt to request the next
character will result in gaps between characters that can be as long as the worst-case inter-
rupt latency. Most applications are not bothered by gaps between characters, but certain
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AMM36DRES | CONN EDGECARD 72POS .156 EYELET |
| FMC65DREN-S734 | CONN EDGECARD 130POS .100 EYELET |
| IDT7133LA20G | IC SRAM 32KBIT 20NS 68PGA |
| FMC65DREH-S734 | CONN EDGECARD 130POS .100 EYELET |
| EMC65DTEF | CONN EDGECARD 130POS .100 EYELET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 20-668-0011 | 功能描述:微處理器 - MPU Rabbit 3000A LQFP Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 20-668-0016 | 功能描述:微處理器 - MPU Rabbit 3000 TFBGA Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 2066-8001-90 | 制造商:TE CONNECTIVITY 功能描述:RF COAXIAL PANEL MOUNT CONNECTOR |
| 20-668-0022 | 功能描述:微處理器 - MPU Rabbit 4000 LQFP Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| 20-668-0024 | 功能描述:微處理器 - MPU Rabbit 4000 LQFP Microprocessor RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。