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參數(shù)資料
| 型號： | 1977IFE |
| 廠商： | Linear Technology Corporation |
| 英文描述： | High Voltage 1.5A, 500kHz Step-Down Switching Regulator with 100uA Quiescent Current |
| 中文描述： | 高電壓，500kHz降壓1.5安培的電流型開關(guān)穩(wěn)壓器的靜態(tài)電流為100uA |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 288K |
| 代理商： | 1977IFE |
LT1977
6
1977f
PIU
NC (Pins 1, 3, 5):
No Connection.
SW (Pin 2):
The SW pin is the emitter of the on-chip power
NPN switch. This pin is driven up to the input pin voltage
during switch on time. Inductor current drives the SW pin
negative during switch off time. Negative voltage is clamped
with the external catch diode. Maximum negative switch
voltage allowed is –0.8V.
V
IN
(Pin 4):
This is the collector of the on-chip power NPN
switch. V
IN
powers the internal control circuitry when a
voltage on the BIAS pin is not present. High di/dt edges
occur on this pin during switch turn on and off. Keep the
path short from the V
IN
pin through the input bypass
capacitor, through the catch diode back to SW. All trace
inductance on this path will create a voltage spike at switch
off, adding to the V
CE
voltage across the internal NPN.
BOOST (Pin 6):
The BOOST pin is used to provide a drive
voltage, higher than the input voltage, to the internal
bipolar NPN power switch. Without this added voltage, the
typical switch voltage loss would be about 1.5V. The
additional BOOST voltage allows the switch to saturate
and its voltage loss approximates that of a 0.2
FET
structure.
C
T
(Pin 7):
A capacitor on the C
T
pin determines the amount
of delay time between the PGFB pin exceeding its thresh-
old (V
PGFB
) and the PG pin set to a high impedance state.
When the PGFB pin rises above V
PGFB
, current is sourced
from the C
T
pin into the external capacitor. When the volt-
age on the external capacitor reaches an internal clamp
(V
CT
), the PG pin becomes a high impedance node. The
resultant PG delay time is given by t = C
CT
V
CT
/I
CT
. If the
TYPICAL PERFOR U
No Load 1A Step Response
Step Response
Burst Mode Operation
Burst Mode Operation
V
20mV/DIV
I
500mA/DIV
V
IN
= 12V
V
OUT
= 3.3V
I
Q
μ
A
2
μ
s/DIV
1977 G15
V
OUT
50mV/DIV
I
500mA/DIV
V
IN
= 12V
V
OUT
= 3.3V
C
OUT
= 100
μ
F
I
DC
= 0mA
500
μ
s/DIV
1977 G17
V
OUT
50mV/DIV
I
OUT
500mA/DIV
V
IN
= 12V
V
OUT
= 3.3V
C
OUT
= 100
μ
F
I
DC
= 350mA
500
μ
s/DIV
1977 G18
V
20mV/DIV
I
500mA/DIV
V
IN
= 12V
V
OUT
= 3.3V
I
Q
μ
A
5ms/DIV
1977 G14
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