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參數(shù)資料
| 型號： | 1977IFE |
| 廠商： | Linear Technology Corporation |
| 英文描述： | High Voltage 1.5A, 500kHz Step-Down Switching Regulator with 100uA Quiescent Current |
| 中文描述： | 高電壓，500kHz降壓1.5安培的電流型開關(guān)穩(wěn)壓器的靜態(tài)電流為100uA |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 288K |
| 代理商： | 1977IFE |
LT1977
16
1977f
APPLICATIOU
Example: For V
OUT
= 3.3V, V
IN
= 12V
W
U
U
I
A
A
IN AVG
(
)
.
.
.
.
=
μ + μ +
45
44
μ +
μ +
)
μ
(
)
(
=
μ + μ +
45
μ =
μ
3 3
12
125
12 5
0 8
0 5
99
To maximize high and low load current efficiency a fast
switching diode with low forward drop and low reverse
leakage should be used. Low reverse leakage is critical to
maximize low current efficiency since its value over tem-
perature can potentially exceed the magnitude of the
LT1977 supply current. Low forward drop is critical for
high current efficiency since the loss is proportional to
forward drop.
These requirements result in the use of a Schottky type
diode. DC switching losses are minimized due to its low
forward voltage drop and AC behavior is benign due to its
lack of a significant reverse recovery time. Schottky diodes
are generally available with reverse voltage ratings of 60V
and even 100V and are price competitive with other types.
The effect of reverse leakage and forward drop on effi-
ciency for various Schottky diodes is shown in Table 5. As
can be seen these are conflicting parameters and the user
Figure 6. Burst Mode with Shutdown Pin
V
50mV/DIV
V
2V/DIV
I
500mA/DIV
V
IN
= 12V
V
OUT
= 3.3V
I
Q
μ
A
TIME (50ms/DIV)
1977 G16
Figure 5. I
Q
vs V
IN
INPUT VOLTAGE (V)
0
0
S
μ
A
50
100
10
20
30
40
1977 F05
50
150
25
75
125
60
V
OUT
= 3.3V
A
= 25
°
C
During the sleep portion of the Burst Mode cycle, the V
C
pin voltage is held just below the level needed for normal
operation to improve transient response. See the Typical
Performance Characteristics section for burst and tran-
sient response waveforms.
If a no load condition can be anticipated, the supply current
can be further reduced by cycling the SHDN pin at a rate
higher than the natural no load burst frequency. Figure 6
shows Burst Mode operation with the SHDN pin. V
OUT
burst ripple is maintained while the average supply current
drops to 15
μ
A. The PG pin will be active low during the
“on” portion of the SHDN waveform due to the C
T
capaci-
tor discharge when SHDN is taken low. See the Power
Good section for further information.
CATCH DIODE
The catch diode carries load current during the SW off
time. The average diode current is therefore dependent on
the switch duty cycle. At high input to output voltage ratios
the diode conducts most of the time. As the ratio ap-
proaches unity the diode conducts only a small fraction of
the time. The most stressful condition for the diode is
when the output is short circuited. Under this condition the
diode must safely handle I
PEAK
at maximum duty cycle.
Table 5. Catch Diode Selection Criteria
I
Q
at 125
°
C
V
IN
=12V
V
OUT
= 3.3
I
L
= 0A
125
μ
A
215
μ
A
EFFICIENCY
V
IN
=12V
V
OUT
= 3.3V
I
L
= 1A
76.1%
80.4%
LEAKAGE
V
OUT
= 3.3V
25
°
C
0.0
μ
A
0.1
μ
A
V
F
AT 1A
25
°
C
0.72V
0.48V
DIODE
IR 10BQ100
Diodes Inc.
B260SMA
Diodes Inc.
B360SMB
IR
MBRS360TR
IR 30BQ100
125
°
C
59
μ
A
242
μ
A
0.2
μ
A
440
μ
A
0.45V
270
μ
A
80.8%
1
μ
A
1.81mA
0.42V
821
μ
A
81.4%
0.5
μ
A
225
μ
A
0.59V
206
μ
A
78.8%
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