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參數(shù)資料
| 型號： | 1977IFE |
| 廠商： | Linear Technology Corporation |
| 英文描述： | High Voltage 1.5A, 500kHz Step-Down Switching Regulator with 100uA Quiescent Current |
| 中文描述： | 高電壓，500kHz降壓1.5安培的電流型開關(guān)穩(wěn)壓器的靜態(tài)電流為100uA |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 288K |
| 代理商： | 1977IFE |
LT1977
19
1977f
APPLICATIOU
the PGFB pin drops below V
PGFB
the C
T
pin is rapidly
discharged resetting the delay period. The PGFB voltage is
typically generated by a resistive divider from the regu-
lated output or input supply.
The capacitor on the C
T
pin determines the amount of
delay time between the PGFB pin exceeding its threshold
(V
PGFB
) and the PG pin set to a high impedance state.
W
U
U
When the PGFB pin rises above V
PGFB
current is sourced
(I
CT
) from the C
T
pin into the external capacitor. When the
voltage on the external capacitor reaches an internal clamp
(V
CT
), the PG pin becomes a high impedance node. The
resultant PG delay time is given by t = C
CT
(V
CT
)/(I
CT
). If
the voltage on the PGFB pin drops below its V
PGFB
, C
CT
will
be discharged rapidly and PG will be active low with a
200
μ
A sink capability. If the SHDN pin is taken below its
threshold during normal operation, the C
T
pin will be
discharged and PG inactive, resulting in a non Power Good
cycle when SHDN is taken above its threshold. Figure 9
shows the power good operation with PGFB connected to
FB and the capacitance on C
T
= 0.1
μ
F. Figure 10 shows
several different configurations for the LT1977 Power
Good circuitry.
LAYOUT CONSIDERATIONS
As with all high frequency switchers, when considering
layout, care must be taken in order to achieve optimal
Figure 9. Power Good
V
500mV/DIV
PG
100k TO V
IN
V
CT
500mV/DIV
V
2V/DIV
TIME (10ms/DIV)
1977 F09
V
IN
PG
PGFB
LT1977
PG at 80% V
OUT
with 100ms Delay
0.27
μ
F
C
OUT
C
OUT
200k
V
OUT
= 3.3V
153k
12k
100k
FB
C
T
V
IN
PG
PGFB
LT1977
V
OUT
Disconnect at 80% V
OUT
with 100ms Delay
0.27
μ
F
200k
V
OUT
= 3.3V
153k
12k
100k
FB
C
T
V
IN
PG
PGFB
LT1977
PG at V
IN
> 4V with 100ms Delay
0.27
μ
F
V
OUT
= 3.3V
200k
511k
200k
100k
165k
FB
C
T
V
IN
PG
PGFB
LT1977
V
OUT
Disconnect 3.3V Logic Signal
with 100
μ
s Delay
270pF
200k
V
OUT
= 12V
1977 F10
866k
100k
FB
C
T
C
OUT
C
OUT
Figure 10. Power Good Circuits
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