參數(shù)資料
型號： 16F871
廠商： Microchip Technology Inc.
英文描述： CAT 5E CROSSOVER PATCH CORD CABLE GREEN 6 FT
中文描述： 28/40-Pin 8位CMOS閃存微控制器
文件頁數(shù)： 68/156頁
文件大?。?/td> 2816K
代理商： 16F871
PIC16F870/871
DS30569A-page 68
Preliminary
1999 Microchip Technology Inc.
Steps to follow when setting up an Asynchronous
Transmission:
1.
Initialize the SPBRG register for the appropriate
baud rate. If a high speed baud rate is desired,
set bit BRGH. (Section 9.1)
2.
Enable the asynchronous serial port by clearing
bit SYNC and setting bit SPEN.
3.
If interrupts are desired, then set enable bit
TXIE.
4.
If 9-bit transmission is desired, then set transmit
bit TX9.
Enable the transmission by setting bit TXEN,
which will also set bit TXIF.
If 9-bit transmission is selected, the ninth bit
should be loaded in bit TX9D.
Load data to the TXREG register (starts trans-
mission).
5.
6.
7.
FIGURE 9-2:
ASYNCHRONOUS MASTER TRANSMISSION
FIGURE 9-3:
ASYNCHRONOUS MASTER TRANSMISSION (BACK TO BACK)
TABLE 9-5:
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
Address
Name
B
it 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
Resets
0Ch
18h
19h
8Ch
98h
99h
Legend:
Note 1:
PIR1
RCSTA
TXREG
PIE1
TXSTA
SPBRG
x
= unknown,
-
= unimplemented locations read as '0'. Shaded cells are not used for asynchronous transmission.
Bits PSPIE and PSPIF are reserved on the PIC16F870; always maintain these bits clear.
PSPIF
(1)
SPEN
USART Transmit Register
PSPIE
(1)
CSRC
Baud Rate Generator Register
ADIF
RX9
RCIF
SREN
TXIF
CREN
—
CCP1IF
FERR
TMR2IF
OERR
TMR1IF
0000 -000
RX9D
0000 -00x
0000 0000
TMR1IE
0000 -000
TX9D
0000 -010
0000 0000
0000 -000
0000 -00x
0000 0000
0000 -000
0000 -010
0000 0000
—
ADIE
TX9
RCIE
TXEN
TXIE
SYNC
—
—
CCP1IE
BRGH
TMR2IE
TRMT
Word 1
Stop Bit
Word 1
Transmit Shift Reg
Start Bit
Bit 0
Bit 1
Bit 7/8
Write to TXREG
Word 1
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(Transmit buffer
reg. empty flag)
TRMT bit
(Transmit shift
reg. empty flag)
Transmit Shift Reg.
Write to TXREG
BRG output
(shift clock)
RC6/TX/CK (pin)
TXIF bit
(interrupt reg. flag)
TRMT bit
(Transmit shift
reg. empty flag)
Word 1
Word 2
Word 1
Word 2
Transmit Shift Reg.
Start Bit
Stop Bit
Start Bit
Word 1
Word 2
Bit 0
Bit 1
Bit 7/8
Bit 0
Note:
This timing diagram shows two consecutive transmissions.
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