參數(shù)資料
型號: 1215E
英文描述: TEST/JTAG SUPPORT|CMOS|QFP|48PIN|PLASTIC
中文描述: 測試/ JTAG支持|的CMOS | QFP封裝| 48PIN |塑料
文件頁數(shù): 49/92頁
文件大?。?/td> 1041K
代理商: 1215E
Agere Systems Inc.
53
User Manual
April 2001
Advanced Operational Mode
497AE and 1215E Boundary-Scan Master 2
Appendix B—BSM2 Register Descriptions (continued)
APO: TVO Address Pointer Register
Purpose
Provides a pointer to currently addressed word of the TVO Test Data Memory (FIFO) (buffer). The currently
addressed word during a scan operation is the word currently being read to supply test data to be scanned into the
selected/attached B-S chain. Autoincrementing of this pointer is turned on and off by the use of the AINC[0] bit.
Address (Octal)
07
Format
Default (Hex)
APO = 0000
Read-only Bits
None
Description
APO[8:0]
(TVO Address Pointer)—In normal scan operation, this register field contains the address [0—777
(octal), 0—511 (decimal)] of the word of the TVO data memory currently being scanned into the cur-
rently selected/attached B-S chain. The only instance in which a controlling processor would write to
this register during normal scan operation would be to reset it to 0 if that were necessary because
TVO operates as a FIFO in normal scan operation—no addressing action by the controlling processor
is necessary.
In ATPG mode the TVO data memory is combined with the TVI data memory to create an intercon-
nect map of the circuit sensed and driven by the selected/attached B-S chain (see under the heading
Scan-Sequence Modifier (SSM)). The interconnect map is written by the controlling processor prior to
starting ATPG. The TVO address pointer (APO) is then used to address the words of TVO to be writ-
ten with the necessary information. (See also, description of the TVOR register and the AINC[0] bit.)
Unlike the TVI address pointer register, after writing data to the TVO data memory, the TVO address
pointer register should not be reset to its initial value.
15—09
08—00
unused
APO[8:0]
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