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CHAPTER 5 EEPROM
83
5.7 Cautions Related to EEPROM Writing
Note the following cautions when performing EEPROM write.
(1)
Before writing, check that EWST0 (EEPROM write control register 0 (EEWC0) bit 1) is set to 0. If executing
another write instruction during EEPROM writing, that instruction executed most recently will be ignored.
As the write time, reserve at least 3.3 ms by hardware.
If performing several write operations in succession, wait until the current write operation has been
completed before starting the next.
Even if the mode changes to HALT mode during EEPROM writing, writing is continued.
If the mode changes to STOP mode during EEPROM writing, the data being written becomes undefined. If
STOP mode is cancelled by an interrupt request, a write termination interrupt request (INTEE0) is
generated after STOP mode has been cancelled. If you want to set STOP mode after normally terminating
write processing, check that write processing has ended using any of the available methods (see
Section
5.5
), then set STOP mode.
(2)
(3)
(4)
(5)
Do not perform the following operations while writing data to the EEPROM; otherwise, the data written to the
addresses in the EEPROM cannot be guaranteed.
(1)
When the internal clock of the main system clock is used as the count clock of EEPROM:
Execute the STOP instruction
Stop the main system clock (by setting MCC (bit 7 of the processor clock control register (PCC)) to 1)
when the subsystem clock is selected as the CPU clock
When output of TM80 (that operates with the internal clock of the main system clock) is selected as the
count clock of EEPROM:
Execute the STOP instruction
Stop the main system clock (MCC = 1) when the subsystem clock is selected as the CPU clock
Disable the timer output (by clearing TOE80 (bit 0 of the 8-bit timer mode control register 80 (TMC80)) to
0)
Stop the timer operation (by clearing TCE80 (TMC80 bit 7) to 0)
Stop the subsystem clock (by setting SCC (bit 0 of the suboscillation mode register (SCKM)) to 1) when the
internal clock of the subsystem clock is selected as the count clock of EEPROM
Clearing EWE0 (EEWC0 bit 0) to 0
Turning the power off
Reset input
(2)
(3)
(4)
(5)
(6)