![](http://datasheet.mmic.net.cn/380000/-PD78196Y_datasheet_16744919/-PD78196Y_66.png)
CHAPTER 4 CPU ARCHITECTURE
66
4.2.3 Special function register (SFR)
Unlike a general-purpose register, each special function register has a special function.
It is allocated in the 256-byte area FF00H to FFFFH.
The special function register can be manipulated, like the general-purpose register, with the operation, transfer,
and bit manipulation instructions. Manipulatable bit units (1, 8, and 16) differ depending on the special function
register type.
Each manipulation bit unit can be specified as follows.
1-bit manipulation
Describes a symbol reserved with assembler for the 1-bit manipulation instruction operand (sfr.bit). This
manipulation can also be specified with an address.
8-bit manipulation
Describes a symbol reserved with assembler for the 8-bit manipulation instruction operand (sfr). This
manipulation can also be specified with an address.
16-bit manipulation
Describes a symbol reserved with assembler for the 16-bit manipulation instruction operand. When specifying
an address, describe an even address.
Table 4-3 lists the special function register. The meanings of the symbols in this table are as follows:
Symbol
Indicates the addresses of the implemented special function registers. The symbols shown in this column are
the reserved words of the assembler, and have already been defined in the header file called “sfrbit.h” of C
compiler. Therefore, these symbols can be used as instruction operands if assembler or integrated debugger
is used.
R/W
Indicates whether the special function register in question can be read or written.
R/W
: Read/write
R
: Read only
W
: Write only
Number of bits manipulated simultaneously
Indicates the bit units (1, 8, and 16) in which the special function register in question can be manipulated.
After reset
Indicates the status of the special function register when the RESET signal is input.