參數(shù)資料
型號(hào): μPD481850
廠商: NEC Corp.
英文描述: Synchronous Graphics Memory (SGRAM)(8M 同步圖形存儲(chǔ)器)
中文描述: 同步圖形存儲(chǔ)器(SGRAM)(8分同步圖形存儲(chǔ)器)
文件頁(yè)數(shù): 31/94頁(yè)
文件大小: 1180K
代理商: ΜPD481850
Preliminary Data Sheet
31
μ
PD481850 for Rev.L
11. Auto Precharge
During a read or write/block write command cycle, A8 controls whether auto precharge is selected. A8 high in
the read or write/block write command (Read with Auto precharge command or Write with Auto precharge
command/Block Write with Auto precharge command), auto precharge is selected and begins after the burst access
automatically.
When the t
RAS
is not satisfied, the precharge does not start at above timing. And the precharge will start when
the t
RAS
is satisfied.
The clock that begins the auto precharge cycle is depend on both the /CAS latency programmed into the mode
register and whether READ or WRITE/BLOCK WRITE cycle.
11.1 Read with Auto Precharge
When using auto precharge in READ cycle, knowing when the precharge starts is important because the next
activate command to the bank being precharged cannot be executed until the precharge cycle ends. Once auto
precharge has started, an activate command to the bank can be asserted after t
RP
has been satisfied.
During READ cycle, the auto precharge begins after t
RAS
and begins on the clock that indicates one clock earlier
the last data word output during the burst is valid.
QB1
QB2
QB3
QB4
Auto precharge starts
READA B
Hi-Z
QB1
QB2
QB3
QB4
Auto precharge starts
READA B
Hi-Z
DQ
Command
DQ
Command
/CAS latency = 2
/CAS latency = 3
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
Burst length = 4
(t
RAS
is satisfied)
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