參數(shù)資料
型號(hào)： μPD45256163
廠商： NEC Corp.
英文描述： 256M-Bit Synchronous DRAM(256M 同步 動(dòng)態(tài)RAM)
中文描述： 256M位同步DRAM（256M同步動(dòng)態(tài)RAM）的
文件頁(yè)數(shù)： 83/84頁(yè)
文件大?。?/td> 1052K
代理商： ΜPD45256163
83
μ
PD45256441,45256841,45256163
Preliminary Data Sheet
1
PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note: Strong electric field, when exposed to a MOS device, can cause destruction
of the gate oxide and ultimately degrade the device operation. Steps must
be taken to stop generation of static electricity as much as possible, and
quickly dissipate it once, when it has occurred. Environmental control
must be adequate. When it is dry, humidifier should be used. It is
recommended to avoid using insulators that easily build static electricity.
Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and
measurement tools including work bench and floor should be grounded.
The operator should be grounded using wrist strap. Semiconductor devices
must not be touched with bare hands. Similar precautions need to be taken
for PW boards with semiconductor devices on it.
2
HANDLING OF UNUSED INPUT PINS FOR CMOS
Note: No connection for CMOS device inputs can be cause of malfunction. If no
connection is provided to the input pins, it is possible that an internal input
level may be generated due to noise, etc., hence causing malfunction. CMOS
device behave differently than Bipolar or NMOS devices. Input levels of
CMOS devices must be fixed high or low by using a pull-up or pull-down
circuitry. Each unused pin should be connected to V
DD
or GND with a
resistor, if it is considered to have a possibility of being an output pin. All
handling related to the unused pins must be judged device by device and
related specifications governing the devices.
3
STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note: Power-on does not necessarily define initial status of MOS device. Produc-
tion process of MOS does not define the initial operation status of the device.
Immediately after the power source is turned ON, the devices with reset
function have not yet been initialized. Hence, power-on does not guarantee
out-pin levels, I/O settings or contents of registers. Device is not initialized
until the reset signal is received. Reset operation must be executed imme-
diately after power-on for devices having reset function.
NOTES FOR CMOS DEVICES
相關(guān)PDF資料
PDF描述
μPD45256441 256M-Bit Synchronous DRAM(256M 同步 動(dòng)態(tài)RAM)
μPD45256841 256M-Bit Synchronous DRAM(256M 同步 動(dòng)態(tài)RAM)
μPD4564163 64M-bit Synchronous DRAM(64M同步動(dòng)態(tài)RAM)
μPD4564441 64M-bit Synchronous DRAM(64M同步動(dòng)態(tài)RAM)
μPD4564841 64M-bit Synchronous DRAM(64M同步動(dòng)態(tài)RAM)
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