參數(shù)資料
型號： μPD45256163
廠商： NEC Corp.
英文描述： 256M-Bit Synchronous DRAM(256M 同步 動態(tài)RAM)
中文描述： 256M位同步DRAM（256M同步動態(tài)RAM）的
文件頁數(shù)： 35/84頁
文件大?。?/td> 1052K
代理商： ΜPD45256163
35
μ
PD45256441,45256841,45256163
Preliminary Data Sheet
DC Characteristics 1 (Recommended Operating Conditions unless otherwise noted)
Maximum.
x8
Parameter
Symbol
Test condition
/CAS
latency
Grade
x4
x16
Unit
Notes
Operating current
I
CC1
Burst length
=
1
CL=2
-A80
110
120
135
t
RC
≥
t
RC(MIN.)
-A10
110
120
135
I
O
= 0
mA
-A10B
90
100
110
One bank active
CL=3
-A80
115
125
145
-A10
115
125
145
-A10B
95
105
120
mA
1
Precharge standby current
I
CC2
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
1
1
1
in power down mode
I
CC2
PS CKE
≤
V
IL(MAX.)
, t
CK
=
∞
I
CC2
N CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns
/CS
≥
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
I
CC2
NS CKE
≥
V
IH(MIN.)
, t
CK
=
∞
Input signals are stable.
I
CC3
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
1
1
1
mA
Precharge standby current
in non power down mode
15
15
15
6
6
6
mA
Active standby current in
3
3
3
power down mode
I
CC3
PS CKE
≤
V
IL(MAX.)
, t
CK
=
∞
I
CC3
N CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns
/CS
≥
V
IH(MIN.)
Input signals are changed one time during 30
ns.
I
CC3
NS CKE
≥
V
IH(MIN.)
, t
CK
=
∞
Input signals are stable.
2
2
2
mA
Active standby current in
non power down mode
25
25
25
15
15
15
mA
Operating current
I
CC4
t
CK
≥
t
CK(MIN.)
CL=2
-A80
100
110
130
(Burst mode)
I
O
= 0
mA
-A10
80
90
110
All banks active
-A10B
75
80
100
CL=3
-A80
115
130
160
-A10
100
115
145
-A10B
95
105
125
mA
2
Refresh current
I
CC5
t
RC
≥
t
RC(MIN.)
CL=2
-A80
180
180
180
-A10
180
180
180
-A10B
150
150
150
CL=3
-A80
180
180
180
-A10
180
180
180
-A10B
150
150
150
mA
3
Self refresh current
I
CC6
CKE
≤
0.2
V
-**
2
2
2
mA
-**L
1
1
1
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK(MIN.)
.
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