參數(shù)資料
型號(hào): μPD4265165
廠商: NEC Corp.
英文描述: 64 M-Bit Dynamic Ram(64M 動(dòng)態(tài)存儲(chǔ)器)
中文描述: 64 m位動(dòng)態(tài)隨機(jī)存儲(chǔ)器(6400動(dòng)態(tài)存儲(chǔ)器)
文件頁(yè)數(shù): 34/48頁(yè)
文件大?。?/td> 535K
代理商: ΜPD4265165
μ
PD42S65165, 4265165
34
Hyper Page Mode (EDO) Byte Late Write Cycle
RAS
V
IH–
V
IL–
t
RASP
UCAS
V
IH–
V
IL–
U I/O
Hi - Z
V
IH–
V
IL–
t
RP
t
RHCP
t
RSH
t
HCAS
t
HPC
t
CSH
t
RCD
t
CRP
t
HCAS
t
CPN
LCAS
V
IH–
V
IL–
t
CRP
t
MRH
t
CP
t
HCAS
t
CP
Address
V
IH–
V
IL–
OE
V
IH–
V
IL–
L I/O
V
IH–
V
IL–
Data in
t
OED
Hi - Z
Hi - Z
t
DH
Hi - Z
Data in
t
OED
t
OED
Hi - Z
Hi - Z
Data in
t
OED
t
DS
t
OED
t
DS
t
DH
t
OED
t
DS
t
DH
t
OEH
t
OEH
t
OEH
t
WP
t
RCS
t
CWL
t
CWL
t
RCS
t
WP
Row
Col.
Col.
Col.
t
RWL
t
CWL
t
WP
t
RCS
t
RAL
t
CAH
t
ASC
t
CAH
t
ASC
t
CAH
t
ASC
t
RAH
t
ASR
t
RAD
WE
V
IH–
V
IL–
Remarks 1.
In the hyper page mode (EDO), read, write and read modify write cycles are available for each of
the consecutive CAS cycles within the same RAS cycle.
2.
This cycle can be used to control either UCAS or LCAS only. Or, it can be used to control UCAS
or LCAS simultaneously, or at random.
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