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參數(shù)資料
| 型號： | μPD26401 |
| 廠商： | NEC Corp. |
| 英文描述： | 1M-Bit SRAM and 2M-Bit MASK ROM COMBO Chip(1M位SRAM 和2M位MASK ROM) |
| 中文描述： | 100萬位的SRAM和2M位掩膜ROM集成芯片（100萬位的SRAM和200萬位掩膜ROM） |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 119K |
| 代理商： | ΜPD26401 |
1998
MOS INTEGRATED CIRCUIT
μ
PD26401
1M-BIT SRAM AND 2M-BIT MASK ROM COMBO CHIP
SRAM (128K-WORD BY 8-BIT) / MASK ROM (256K-WORD BY 8-BIT)
DATA SHEET
Document No. M12914EJ1V0DS00 (1st edition)
Date Published January 1998 NS CP (K)
Printed in Japan
The information in this document is subject to change without notice.
Description
The
μ
PD26401 is a memory device combined 1,048,576 bits (131,072 words x 8
bits) CMOS static RAM and
2,097,152 bits (262,144 words x 8 bits) mask programmable ROM on one chip.
The
μ
PD26401 is packed in 32-pin plastic TSOP (I).
Features
Word organization
Static RAM : 131,072 words x 8 bits
Mask ROM : 262,144 words x 8 bits
Power supply : Vcc=1.8 to 3.3
V
Access time (MAX.)
500
ns : Vcc
=
1.8 to 2.2
V
375
ns : Vcc
=
2.2 to 2.7
V
250
ns : Vcc
=
2.7 to 3.3
V
ROM enable input : /ROMCS
RAM enable input : /RAMCS
Ordering Information
Part Number
Package
μ
PD26401GU-
×××
-9JH
μ
PD26401GU-
×××
-9KH
32-pin plastic TSOP (I) (8 x 13.4 mm) (Normal bent)
32-pin plastic TSOP (I) (8 x 13.4 mm) (Reverse bent)
(
×××
: ROM code suffix)
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