參數(shù)資料
型號: μPD42S16165L
廠商: NEC Corp.
英文描述: 16M- bit CMOS dynamic RAMs(16M CMOS 動態(tài)RAM)
中文描述: 1,600位CMOS動態(tài)存儲器(1,600的CMOS動態(tài)內(nèi)存)
文件頁數(shù): 1/48頁
文件大小: 451K
代理商: ΜPD42S16165L
1994
DATA SHEET
The mark
shows major revised points.
MOS INTEGRATED CIRCUIT
μ
PD42S16165L, 4216165L
Description
The
μ
PD42S16165L, 4216165L are 1,048,576 words by 16 bits CMOS dynamic RAMs with optional EDO.
EDO is a kind of the page mode and is useful for the read operation.
Besides, the
μ
PD42S16165L can execute CAS before RAS self refresh.
The
μ
PD42S16165L, 4216165L are packaged in 50-pin plastic TSOP (
II
) and 42-pin plastic SOJ.
Features
EDO (Hyper page mode)
1,048,576 words by 16 bits organization
Single +3.3 V
±
0.3 V power supply
Fast access and cycle time
Part number
Power consumption
Active (MAX.)
Access time
(MAX.)
R/W cycle time
(MIN.)
EDO (Hyper page mode)
cycle time (MIN.)
μ
PD42S16165L-A50, 4216165L-A50
432 mW
50 ns
84 ns
20 ns
μ
PD42S16165L-A60, 4216165L-A60
396 mW
60 ns
104 ns
25 ns
μ
PD42S16165L-A70, 4216165L-A70
360 mW
70 ns
124 ns
30 ns
The
μ
PD42S16165L can execute CAS before RAS self refresh
Part number
Refresh cycle
Refresh
Power consumption at standby
(MAX.)
μ
PD42S16165L
4,096 cycles/128 ms
CAS before RAS self refresh,
CAS before RAS refresh,
RAS only refresh, Hidden refresh
0.54 mW
(CMOS level input)
μ
PD4216165L
4,096 cycles/64 ms
CAS before RAS refresh,
RAS only refresh,
Hidden refresh
1.8 mW
(CMOS level input)
Document No. M10075EJ5V0DS00 (5th edition)
Date Published January 1997 N
Printed in Japan
The information in this document is subject to change without notice.
3.3 V OPERATION 16 M-BIT DYNAMIC RAM
1 M-WORD BY 16-BIT, EDO, BYTE READ/WRITE MODE,
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