參數(shù)資料
型號(hào): ZXRD1050PQ16TA
英文描述: IC-SM-DC/DC CONTROLLER
中文描述: IC-SM-DC/DC控制器
文件頁數(shù): 6/28頁
文件大?。?/td> 639K
代理商: ZXRD1050PQ16TA
Functional Block Diagram
PIN DESCRIPTIONS
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
See relevant Applications Section
Name
Bootstrap
V
DRIVE
PWRG
ND
G
ND
C
T
V
INT
R
SENSE+
R
SENSE-
SHDN
Decoup
LBF
LB
SET
Description
Bootstrap circuit for generating gate drive
Output to the gate drive circuit for main N/P channel switches
Power ground
Signal ground
Timing Capacitor sets oscillator frequency.
Internal Bias Circuit. Decouple with 1 F ceramic capacitor
Higher potential input to the current sense for current limit circuit
Lower potential input to the current sense for current limit circuit
Shutdown control. Active low.
Optional short circuit and overload decoupling capacitor for increased accuracy
Low battery flag output. Active low, open collector output
Low battery flag set. Can be connected to V
IN
if unused, or threshold set
via potential divider.
Input Voltage
External R and C to set the desired cycle time for hiccup circuit.
Compensation pin to allow for stability components and soft start.
Feedback Voltage. This pin has a different function between fixed and
adjustable controller options. The appropriate controller must be used for
the fixed or adjustable solution. Connect to V
OUT
for fixed output, or to
potential divider for adjustable output.
13
14
15
16
V
IN
Delay
Comp
V
FB
6
ISSUE 3 - MAY 2000
ZXRD1000 SERIES
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