參數(shù)資料
型號: ZXRD1050PQ16TA
英文描述: IC-SM-DC/DC CONTROLLER
中文描述: IC-SM-DC/DC控制器
文件頁數(shù): 20/28頁
文件大小: 639K
代理商: ZXRD1050PQ16TA
20
Designing with the ZXRD and Dynamic
Performance
This section refers to the reference design for the 3.3V,
4A output N channel synchronous converter. This is
as shown previously in the Optimising for transient
response section of the applications information (page
10). This circuit is also representative of the ZXRD
evaluation board (see ordering information).
The ZXRD series has been designed to give the best
in terms of all round flexibility allowing engineers to
either use the reference design as is, or to tailor the
design to the individual requirements. This section
demonstrates the performance features of the ZXRD
series and its associated components.
Efficiency
Efficiency is often quoted as one of the key parameters
of a DC-DC converter. Not only does it give an
instantaneous idea of heat dissipation, but also an idea
as to the extent battery life can be extended in say
portable applications. Fig.1 shows the efficiency of the
standard application circuit. Efficiency vs Output
current is shown for the 5 to 3.3V configuration.
Startup
Startup is always important in DC-DC converter
applications. Magnetics have large inrush current
requirements. For higher current applications using
large input and output capacitors the startup current can
be quite significant. This can cause several problems.
In many applications the power supply to the DC-DC
converter can be affected. Particularly in battery
powered applications, trying to take large steps in
load current out of the supply can result in either
current limitation (by the internal impedance of the
battery), or it can actually damage the battery.
For the converter itself, large changes in load current
can result in false triggering of the RSENSE circuit. This
could result in device hiccup (see applications section).
The ZXRD programmable soft start function
eliminates both these problems. This is very clear to
see in operation if the main switching waveforms are
examined.
The soft start is programmed by the combination of
resistor and capacitor R3 and C7. As a recommendation,
R3 and C7 are set to 3k and 22 F respectively, which limits
the peak startup current appropriately in the reference
circuit. Fig.2 shows the startup waveforms. V
IN
and V
OUT
are plotted against time
Efficiency v I
V
OUT
=3.3V.
OUT
50
55
60
65
70
75
80
85
90
95
100
0.1
1
10
I
(A)
OUT
V =5V
E
Fig.1. 5-3.3V Efficiency to 4A
ISSUE 3 - MAY 2000
ZXRD1000 SERIES
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