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參數(shù)資料
| 型號： | ZPSD611(V)E1 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設備和嵌入式微-細胞（可編程邏輯，零功耗，4K的位的SRAM，26余個可編程輸入/輸出，通用PLD的有63個輸入） |
| 文件頁數(shù)： | 54/98頁 |
| 文件大?。?/td> | 484K |
| 代理商： | ZPSD611(V)E1 |
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ZPSD6XX(V) Family
12-54
The ZPSD6XX(V) has internal EPROM and SRAM memory blocks. The memory select
signals come from the DPLD and are user-defined in the PSDsoft Software.
EPROM
The ZPSD6XX(V) provides three EPROM densities: 256K bit, 512K bit or 1M bit. The
EPROM is divided into eight blocks. The EPROM can be configured as 32K x 8, 64K x 8
or 128K x 8 for eight-bit data busses and 16K x 16, 32K x 16 or 64K x 16 for sixteen-bit
data buses.
Each block has its own EPROM select. Blocks zero to six have one select (ES0-ES6) and
block 7 has two selects, ES7A and ES7B, either of which enables Block 7. The dual selects
allow Block 7 to reside in two separate memory spaces.
A typical application would be to store an MCU reset vector residing in the memory space
and accessed by ES7B. The rest of the Block 7 memory space would be accessed by
ES7A. The same technique can also be used to store the configuration bytes of the Intel
80251 microcontroller which reside at the high end of the memory space.
SRAM
The SRAM has 4K bits of memory that can be configured as 512 x 8 or 256 x 16. The
SRAM is enabled from the RS0 output of the DPLD. The SRAM has a battery back-up
mode which is automatically invoked when the supply voltage drops under the standby
voltage. SRAM write protection is provided in back-up mode.
Memory Select Map
The EPROM and SRAM select are outputs from the DPLD whose equations are defined
using PSDabel. The following rules apply to the memory space definitions:
1. EPROM block select space should not be larger than the physical block size
2. EPROM block select space must not overlap
3. SRAM, I/O and Peripheral I/O spaces cannot overlap
4. SRAM, I/O and Peripheral I/O spaces can overlap EPROM with priority given to the
SRAM or I/O. This allows the SRAM or I/O to utilize the space that is not used by the
EPROM.
Memory Blocks
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