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| 型號： | ZPSD611(V)E1 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞（可編程邏輯，零功耗，4K的位的SRAM，26余個可編程輸入/輸出，通用PLD的有63個輸入） |
| 文件頁數(shù)： | 42/98頁 |
| 文件大?。?/td> | 484K |
| 代理商： | ZPSD611(V)E1 |
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ZPSD6XX(V) Family
12-42
Port Operating Modes
The I/O Ports have several modes of operation as shown in Table 21. The mode may be
selected using the PSDabel tool and programmed into the device using Non-Volatile
Memory (NVM) that is active when power is applied and cannot be altered unless the
device is reprogrammed. If a mode is not defined in PSDsoft, then other modes can be
set by the microcontroller writing to the Port configuration registers. The PLD I/O, Data Port
and Address Input modes are NVM configurations. The other modes are initiated by the
microcontroller.
If the NVM modes are not selected, the port can be altered dynamically between MCU I/O
or Address Out modes by writing to the Control Register. Each bit of the eight-bit Control
Register may store a “1”, setting its respective bit in the port to MCU I/O, or to a “0”, setting
it to Address Out. The Direction Register or the output enable product term determine if the
pin is input or output.
Table 21 summarizes the operating modes of the I/O ports. Not all the functions are
available to every port. Table 22 shows how and where the different modes are configured.
Port Mode
Port A
Port B
Port C
Port D
MCU I/O
Yes
Yes
Yes
Yes
PLD I/O
McellAB Outputs
McellC Outputs
ECSPLD Outputs
PLD Inputs
PA7–4
No
PA3–0
Yes
PB7–4
No
PB3–0
Yes
No
PC7–3, 1–0
No
Yes
No
No
PD2–0
Yes
Address Out
Yes (A7–0)
Yes (A7–0,
A15–8)
No
No
Address In
Yes
Yes
Yes
No
Data Port
Yes (D7–0)
Yes (D15–8)
No
No
Open Drain
Yes (PA7–4)
Yes (PB7–4)
Yes
No
Slew Rate
Yes (PA3–0)
Yes (PB3–0)
No
No
Peripheral I/O
Yes
No
No
No
Table 21. Port Operating Modes
I/O Ports
(cont.)
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