參數(shù)資料
型號: ZPSD211R
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,可加密,零功耗,12個可單獨配置I/O)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,可加密,零功耗,12個可單獨配置的I / O)
文件頁數(shù): 9/32頁
文件大?。?/td> 149K
代理商: ZPSD211R
PSD211R
9
Function
PADA and PADB Inputs
In CSI mode (when high), PAD deselects all of its outputs and enters a
power-down mode (see Tables 9 and 10). In A19 mode, it is another
input to the PAD.
A19/CSI
A16–A18
These are general purpose inputs from Port C. See Figure 3, Note 4.
A11–A15
These are address inputs.
RD/E
This is the read pulse or enable strobe input.
WR or R/W
This is the write pulse or R/W select signal.
ALE
This is the ALE input to the chip.
RESET
This deselects all outputs from the PAD; it can not be used in product
term equations. See Tables 7 and 8.
PADA Outputs
These are internal chip-selects to the 8 EPROM banks. Each bank can
be located on any boundary that is a function of one product term of the
PAD address inputs.
ES0–ES7
This internal chip-select selects the I/O ports. It can be placed on any
boundary that is a function of one product term of the PAD inputs. See
Table 6.
CSIOPORT
PADB Outputs
CS0–CS3
These chip-select outputs can be routed through Port B. Each of them is
a function of up to four product terms of the PAD inputs.
CS4–CS7
These chip-select outputs can be routed through Port B. Each of them is
a function of up to two product terms of the PAD inputs.
CS8–CS10
These chip-select outputs can be routed through Port C. See Figure 3,
Note 4. Each of them is a function of one product term of the PAD inputs.
Table 3. PSD211R PADA and PADB Functions
Programmable
Address
Decoder (PAD)
(cont.)
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