參數(shù)資料
型號(hào): ZPSD211R
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,可加密,零功耗,12個(gè)可單獨(dú)配置I/O)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,可加密,零功耗,12個(gè)可單獨(dú)配置的I / O)
文件頁數(shù): 6/32頁
文件大?。?/td> 149K
代理商: ZPSD211R
Table 1.
PSD211R Pin
Descriptions
(cont.)
PSD211R
6
Name
Type
Description
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PA7–PA0 is an 8-bit I/O port. When CPAF2 = 0 it can be configured
separately as an I/O or lower-order latched address line. When
configured as an I/O (CPAF1 = 0), the direction of the pin is defined
by its direction bit, which resides in the direction register. If a pin is
an I/O output, its data bit (which resides in the data register) comes
out. When it is configured as a low-order address line (CPAF1 =1),
A7–A0 can be made the corresponding output through this port
(e.g., PA6 can be configured to be the A6 address line).
I/O
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PB7–PB0 is an 8-bit port for which each bit can be configured as an
I/O (CPBF = 1) or chip-select output (CPBF = 0). When configured
as an I/O, the direction of the pin is defined by its direction bit, which
resides in the direction register. If a pin is an I/O output, its data
(which resides in the data register) comes out. When configured
as a chip-select output, CS0–CS3 are a function of up to four
product terms of the inputs to the PAD B; CS4–CS7 then are each a
function of up to two product terms.
I/O
This is a 3-bit port for which each bit is configurable as a PAD A
and B input or output. When configured as an input (CPCF = 0),a bit
individually becomes an address (CATD = 1) or a logic input
(CATD = 0). The addresses can be latched with ALE (CADDHLT = 1)
or be transparent inputs to the PADs (CADDHLT = 0). When a pin is
configured as an output (CPCF = 1), it is a function of one product
term of all PAD inputs. See Figure 6.
PC0
PC1
PC2
I/O
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
These pins are the multiplexed low-order address/data byte.
After ALE latches the addresses, these pins input or output data,
depending on the settings of the RD/E, WR/V
PP
or R/W, and
PSEN pins.
I/O
A8
A9
A10
A11
A12
A13
A14
A15
I/O
These pins are the high-order address lines.
GND
P
V
SS
(ground) pin.
V
CC
P
Supply voltage input.
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