參數(shù)資料
型號： Z9025900ZEM
英文描述： SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):35A; Peak Non Repetitive Surge Current, Itsm:500A; Gate Trigger Current Max, Igt:40uA
中文描述： 消費性IC
文件頁數(shù)： 8/30頁
文件大?。?/td> 938K
代理商： Z9025900ZEM
Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
PS001300-TVC1099
Preliminary
8
Table 36
Table 37
Table 38
Table 39
Table 40
Table 41
Table 42
Table 43
Table 44
Table 45
Table 46
Table 47
Table 48
Table 49
Table 50
Table 51
Table 52
Table 53
Table 54
Table 55
Table 56
Table 57
Table 58
Table 59
Table 60
Table 61
Table 62
Table 63
Table 64
Table 65
Table 66
Table 67
Table 68
Table 69
Table 70
Table 71
Table 72
Port configuration Register 00H: Bank F (PCON) . . . . . . . . . . . . . . . . . 58
Port 2 Mode Register F6H: P2M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Port 2 Data Register 02H: P2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Port 4 Pin-Out Selection Register 08H: Bank C (PIN_SLT) . . . . . . . . . 60
Port 4 Data Register 05H: Bank C (PRT4_DTA) . . . . . . . . . . . . . . . . . . 61
Port 4 Direction Control Register 06H: Bank C (PRT4_DRT) . . . . . . . . 62
PWM Mode Register 0DH: Bank B (P_MODE) . . . . . . . . . . . . . . . . . . . 63
Port 5 Data Register CH: Bank B (PRT5_DTA) . . . . . . . . . . . . . . . . . . . 63
Port 5 Direction Control Register 0EH: Bank B (PRT5_DRT) . . . . . . . . 64
Port 6 Data Register 03H: Bank F (PRT6_DTA) . . . . . . . . . . . . . . . . . . . 65
Port 6 Direction Control Register 02H: Bank F (PRT6_DRT) . . . . . . . . 66
Timer Control Register 0 01H: Bank C (TCR0) . . . . . . . . . . . . . . . . . . . 67
Timer Control Register 1 02H: Bank C (TCR1) . . . . . . . . . . . . . . . . . . . 68
IR Capture Register 0 03H: Bank C (IR_CP0) . . . . . . . . . . . . . . . . . . . . . 69
IR Capture Register 1 04H: Bank C (IR_CP1) . . . . . . . . . . . . . . . . . . . . . 70
PWM Mode Register 0DH: Bank B (P_MODE) . . . . . . . . . . . . . . . . . . . 71
Port 4 Pin-Out Selection Register 08H: Bank C (PIN_SLT) . . . . . . . . . 72
PWM 1 Data Register 02H: Bank B (PWM1) . . . . . . . . . . . . . . . . . . . . . 75
PWM 2 Data Register 03H: Bank B (PWM2) . . . . . . . . . . . . . . . . . . . . . 75
PWM 3 Data Register 04H: Bank B (PWM3) . . . . . . . . . . . . . . . . . . . . . 75
PWM 4 Data Register 05H:Bank B (PWM4) . . . . . . . . . . . . . . . . . . . . . 76
PWM 5 Data Register 06H: Bank B (PWM5) . . . . . . . . . . . . . . . . . . . . . 76
PWM 6 (6-bit)Data Register 07H: Bank B (PWM6) . . . . . . . . . . . . . . . . 77
PWM 7 Data Register 08H: Bank B (PWM7) . . . . . . . . . . . . . . . . . . . . . 77
PWM 8 Data Register 09H: Bank B (PWM8) . . . . . . . . . . . . . . . . . . . . . 77
PWM 9 Data Register 0AH: Bank B (PWM9) . . . . . . . . . . . . . . . . . . . . 78
PWM 10 Data Register 0BH: Bank B (PWM10) . . . . . . . . . . . . . . . . . . . 78
PWM 6 (14-bit) High Data Register 08H: Bank F (PWM6H) . . . . . . . . . 79
PWM 6 (14-bit) Low Data Register 09H: Bank F (PWM6L) . . . . . . . . . 79
PWM 11 High Data Register 00H: Bank B (PWM11H) . . . . . . . . . . . . . 79
PWM 11 Low Data Register 01H: Bank B (PWM11L) . . . . . . . . . . . . . . 80
3-Bit ADC Data Register 00H: Bank C (3ADC_DTA) . . . . . . . . . . . . . . . 83
4-Bit ADC Data Register 01H: Bank F (4ADC_DTA) . . . . . . . . . . . . . . . 83
Operational Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
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