參數(shù)資料
型號: Z9025900ZEM
英文描述: SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):35A; Peak Non Repetitive Surge Current, Itsm:500A; Gate Trigger Current Max, Igt:40uA
中文描述: 消費(fèi)性IC
文件頁數(shù): 11/30頁
文件大?。?/td> 938K
代理商: Z9025900ZEM
Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
PS001300-TVC1099
Preliminary
11
Figure 3
Z90255 Block Diagram
Note:
PWM 6 can be either a 6-bit or 14-bit output.
The Z90255 takes full advantage of Zilog’s Z8 expanded register file space to offer greater
flexibility in creating a user-friendly On-Screen Display (OSD).
Three basic addressing spaces are available: Program memory, Video RAM (VRAM) and
the Register file. The register file is composed of 300 bytes of general-purpose registers,
16 control and status registers, one I/O port register and three reserved registers.
The OSD module supports 10 rows by 24 columns of characters. Each character color can
be specified. There are eight foreground colors and eight background colors. When the
foreground and background colors are the same, the background is transparent.
RESET
Counter
Timer
Counter
Timer
OWDT
4-Bit
ADC
CIR
Port 6
300 Byte
Register File
Port 2
18 KB by 7-Bit
Character
ROM or OTP
PWM 11 & 6
(14-bit)
PWM 1
to
PWM 10
(6-bit)
XTAL1
XTAL2
RESET
ADC0
ADC1
ADC2
ADC3
IRIN
P60
P61
P62
P63
P21
P22
P23
P24
P25
P26
P27
P20
PWM11
PWM6
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
PWM10
SCLK0
SDATA0
SCLK1
SDATA1
I
2
C
P50
P51
P52
P53
P54
P55
P56
Port 5
Interface
240 x 12-Bit
& 10 x 8-Bit
Character RAM
32 KB
Program ROM
or
32 KB
Program OTP
Microprocessor
Core
Internal
On-Screen
Display
OSDX1
OSDX2
H
SYNC
V
SYNC
R
G
B
V
BLANK
HLFTN
Port 4
P40
P41
P42
P43
P44
P45
P46
P47
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