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參數(shù)資料
| 型號： | Z9025900ZEM |
| 英文描述： | SCR Thyristor; SCR Type:Standard Gate; Peak Repetitive Off-State Voltage, Vdrm:600V; On-State RMS Current, IT(rms):35A; Peak Non Repetitive Surge Current, Itsm:500A; Gate Trigger Current Max, Igt:40uA |
| 中文描述： | 消費(fèi)性IC |
| 文件頁數(shù)： | 25/30頁 |
| 文件大?。?/td> | 938K |
| 代理商： | Z9025900ZEM |
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Z90255 ROM and Z90251 OTP
32 KB Television Controller with OSD
PS001300-TVC1099
Preliminary
25
Vertical Position Register
The Vertical Position Register (Table 6) sets the vertical placement of the
OSD
on the
screen. The unit of measure for placement is the number of scan lines from the top of the
TV field.
The value required for this register can be computed using the following equation:
VERT_POS = (V
POS
- 6) / 4
VERT_POS
represents the contents of bits 5,4,3,2,1,0 of the Vertical Position Register
(
VERT_POS
). The default value is
0
. When the value is
0
, the OSD is at the top-most
OSD position on the screen, with an offset of
06h
scan lines above the OSD area.
VERT_POS
is the number of scan lines from the V
SYNC
to the OSD start position. V
POS
must be a positive integer with a minimum value of Ah incrementing by 4.
Table 6
Vertical Position Register 01h:Bank A (VERT_POS)
Bit
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
N
OTE
:
R = Read W = Write X = Indeterminate
Bit/
Field
Bit
Position
R/W
Value Description
reserved
7
R
W
0
1
Return 0
No effect
Character double
height
6
R/W
0
1
Normal when bit 3 of OSD_CNTL is
0
.
2X when bit 3 of OSD_CNTL is
1
.
Double height when bit 3 of
OSD_CNTL is
0.
Double width when bit 3 of
OSD_CNTL is
1
.
Vertical Position
5,4,3,2,1,0
R/W
Vertical position control
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