參數(shù)資料
型號(hào): XRT83VSH314
廠商: Exar Corporation
英文描述: 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: 14-CHANNEL的T1/E1/J1短途線路接口單元
文件頁(yè)數(shù): 57/80頁(yè)
文件大?。?/td> 497K
代理商: XRT83VSH314
XRT83VSH314
54
REV. 1.0.1
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
D1
JABW
Jitter Bandwidth (E1 Mode Only, T1 is permanently set to 3Hz)
The jitter bandwidth is a global setting that is applied to both the
receiver and transmitter jitter attenuator.
0 = 10Hz
1 = 1.5Hz
R/W
0
D0
FIFOS
FIFO Depth Select
The FIFO depth select is used to configure the part for a 32-bit or
64-bit FIFO (within the jitter attenuator blocks). The delay of the
FIFO is equal to the FIFO depth. This is a global setting that is
applied to both the receiver and transmitter FIFO.
0 = 32-Bit
1 = 64-Bit
R/W
0
T
ABLE
26: M
ICROPROCESSOR
R
EGISTER
0
X
02
H
B
IT
D
ESCRIPTION
C
HANNEL
0-13 (0
X
02
H
-0
X
D2
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
INVQRSS
QRSS inversion
INVQRSS is used to invert the transmit QRSS or PRBS pattern set
by the TxTEST[2:0] bits. By default (bit D7=0), INVQRSS is dis-
abled for PRBS and enabled for QRSS.
0 = Disabled for PRBS
0 = Enabled for QRSS
1 = Disabled for QRSS
1 = Enabled for PRBS
R/W
0
D6
D5
D4
TxTEST2
TxTEST1
TxTEST0
Test Code Pattern
TxTEST[2:0] are used to select a diagnostic test pattern to the line
(transmit outputs).
0XX = No Pattern
100 = Tx QRSS
101 = Tx TAOS
110 = Reserved
111 = Reserved
R/W
0
0
0
T
ABLE
25: M
ICROPROCESSOR
R
EGISTER
0
X
01
H
B
IT
D
ESCRIPTION
C
HANNEL
0-13 (0
X
01
H
-0
X
D1
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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