TABLE
參數(shù)資料
型號： XRT83L38IB-F
廠商： Exar Corporation
文件頁數(shù)： 63/87頁
文件大?。?/td> 0K
描述： IC LIU T1/E1/J1 OCTAL 225BGA
標(biāo)準(zhǔn)包裝： 84
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 8/8
規(guī)程： T1，E1，J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 225-BGA
供應(yīng)商設(shè)備封裝： 225-BGA（19x19）
包裝： 托盤
XRT83L38
63
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.2
TABLE 29: MICROPROCESSOR REGISTER #10, BIT DESCRIPTION
REGISTER ADDRESS
00001010
00011010
00101010
00111010
01001010
01011010
01101010
01111010
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
CHANNEL_4
CHANNEL_5
CHANNEL_6
CHANNEL_7
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
R/W
0
D6-D0
B6S3_n -
B0S3_n
Arbitrary Transmit Pulse Shape, Segment 3
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the third time segment. B6S3_n-
B0S3_n is in signed magnitude format with B6S3_n as the
sign bit and B0S3_n as the least significant bit (LSB).
R/W
0
TABLE 30: MICROPROCESSOR REGISTER #11, BIT DESCRIPTION
REGISTER ADDRESS
00001011
00011011
00101011
00111011
01001011
01011011
01101011
01111011
CHANNEL_n
CHANNEL_0
CHANNEL_1
CHANNEL_2
CHANNEL_3
CHANNEL_4
CHANNEL_5
CHANNEL_6
CHANNEL_7
FUNCTION
REGISTER
TYPE
RESET
VALUE
BIT #
NAME
D7
Reserved
R/W
0
D6-D0
B6S4_n -
B0S4_n
Arbitrary Transmit Pulse Shape, Segment 4
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
Table 5. The arbitrary pulse is divided into
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the fourth time segment. B6S4_n-
B0S4_n is in signed magnitude format with B6S4_n as the
sign bit and B0S4_n as the least significant bit (LSB).
R/W
0
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