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參數(shù)資料
| 型號： | XRT83L38IB-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 14/87頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU T1/E1/J1 OCTAL 225BGA |
| 標準包裝： | 84 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 225-BGA |
| 供應(yīng)商設(shè)備封裝： | 225-BGA（19x19） |
| 包裝： | 托盤 |
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XRT83L38
18
REV. 1.0.2
OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
EQC4
EQC3
EQC2
EQC1
EQC0
RDY_DTACK
CS
ALE_AS
RD_DS
WR_R/W
A6
B7
A7
C7
D7
A6
B7
A7
C7
D7
I
O
I
Equalizer Control Input 4 - Hardware mode
This pin together with pins EQC[3:0] is used to control the transmit pulse shaping,
transmit line build-out (LBO) and receive monitoring while operating at one of either
the T1, E1 or J1 clock rates/modes.
AND TRANSMIT LINE BUILD-OUT SETTINGS” ON PAGE 30. for description
of Transmit Equalizer Control bits.
Equalizer Control Input 3
Equalizer Control Input 2
Equalizer Control Input 1
Equalizer Control Input 0
NOTES:
1.
In Hardware mode all transmit channels share the same pulse setting
controls function.
2.
All channels of an XRT83L38 must operate at the same clock rate, either the
T1, E1 or J1 modes.
In Host mode, these pins perform various microprocessor functions.
NOTE: Internally pulled “Low” with a 50k
Ω resistor.
RXTSEL
U11
I
Receiver Termination Select
In Hardware mode, when this pin is “Low” the receive line termination is determined
only by an external resistor. When “High”, the receive termination is realized by the
internal resistor or the combination of internal and external resistors. These conditions
are described in the table below.
NOTE: In Hardware mode all channels share the same RXTSEL control function.
In Host mode, the RXTSEL_n bits in the channel control registers determine if the
receiver termination is external or internal. However, the function of RXTSEL can be
transferred to the Hardware pin by setting the TERCNTL bit (bit 6) to “1” in the register
address hex 0x82.
NOTE: This pin is internally pulled “Low” with a 50k
Ω resistor.
TXTSEL
V11
I
Transmit Termination Select - Hardware Mode
When this pin is “Low” the transmit line termination is determined only by an external
resistor. When “High”, the transmit termination is realized only by the internal resistor.
NOTES:
1.
This pin is internally pulled “Low” with a 50k
Ω resistor.
2.
In Hardware mode all channels share the same TXTSEL control function.
SIGNAL NAME
LEAD #TYPE
DESCRIPTION
RXTSEL
RX Termination
0
1
External
Internal
TXTSEL
TX Termination
0
1
External
Internal
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83L38IV | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83SH314 | 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83SH314_0610 | 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
| XRT83SH314ES | 功能描述:外圍驅(qū)動器與原件 - PCI 14 CHT1/E1LIU SH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SH314IB | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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