參數(shù)資料
型號: XRT73L03BIV-F
廠商: Exar Corporation
文件頁數(shù): 6/61頁
文件大?。?/td> 0K
描述: IC LIU E3/DS3/STS-1 3CH 120LQFP
標準包裝: 72
類型: 線路接口裝置(LIU)
驅(qū)動器/接收器數(shù): 3/3
規(guī)程: DS3,E3,STS-1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 120-LQFP
供應商設(shè)備封裝: 120-LQFP(14x20)
包裝: 托盤
XRT73L03B
3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
REV. 1.0.1
12
104
RxOFF_2
I
Receiver Shut OFF Input - Channel 2:
Hardware Mode - Receiver Shut OFF Input - Channel 2:
Setting this input pin "High" shuts off the Receive Section in Channel 2.
Setting this input pin "Low" enables the Receive Section for full opera-
tion.
96
REGR/
RxClkINV
I
Register Reset Input pin (Invert RxClk(n)) Output - Select):
The function of this pin depends upon whether the XRT73L03B is oper-
ating in the HOST Mode or in the Hardware Mode.
NOTE: This pin is internally pulled "High".
In the HOST-Mode - Register Reset Input:
Setting this input pin "Low" causes the XRT73L03B to reset the contents
of the Command Registers to their default settings and default operating
configuration.
In the Hardware Mode - Invert RxClk Output Select:
Setting this input pin "High" configures the Receive Section of all Chan-
nels in the XRT73L03B to invert their RxClk_(n) clock output signals and
configures Channel (n) to output the recovered data via the RPOS_(n)
and RNEG_(n) output pins on the falling edge of RxClk_(n).
Setting this pin "Low" configures Channel (n) to output the recovered
data via the RPOS_(n) and RNEG_(n) output pins on the rising edge of
RxClk_(n).
MICROPROCESSOR INTERFACE
PIN #
NAME
TYPE
DESCRIPTION
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