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參數(shù)資料
| 型號： | XR68M752IM48-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 15/54頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 64B DUAL 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS232，RS422，RS485 |
| 電源電壓： | 1.62 V ~ 3.63 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1479 1016-1479-ND 1016-1642 XR68M752IM48-F-ND |
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XR16M752/XR68M752
22
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.1.1
2.18
Sleep Mode with Wake-Up Indicator and PowerSave Feature
The M2751 supports low voltage system designs, hence, a sleep mode with auto wake-up and PowerSave
feature is included to reduce power consumption when the device is not actively used.
2.19
Sleep Mode with Auto Wake-Up
The M752 supports low voltage system designs, hence, a sleep mode is included to reduce its power
consumption when the chip is not actively used. In addition, there is a PowerSave Feature on the 49-pin
STBGA package that eliminates any unnecessary external buffer.
All of these conditions must be satisfied for the M752 to enter sleep mode:
■ no interrupts pending for both channels of the M752 (ISR bit-0 = 1)
■ sleep mode of both channels are enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pins are idling HIGH
The M752 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The M752 resumes normal operation by any of the following:
■ a receive data start bit transition (HIGH to LOW)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the M752 is awakened by any one of the above conditions, it will return to the sleep mode automatically after
all interrupting conditions have been serviced and cleared. If the M752 is awakened by the modem inputs, a
read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while
an interrupt is pending from channel A or B. The M752 will stay in the sleep mode of operation until it is
disabled by setting IER bit-4 to a logic 0.
If the address lines, data bus lines, IOW#, IOR#, CSA#, CSB#, and modem input lines remain steady when the
M752 is in sleep mode, the maximum current will be in the microamp range as specified in the DC Electrical
Characteristics on page 40. If the input lines are floating or are toggling while the M752 is in sleep mode, the
current can be up to 100 times more. If any of those signals are toggling or floating, then an external buffer
would be required to keep the address, data and control lines steady to achieve the low current.
2.19.1
PowerSave Feature (49-pin STBGA pacakge only)
The PowerSave Feature will eliminate the need for an external buffer by internally isolating the address, data
and control signals from other bus activities that could cause wasteful power drain. The M752 enters
PowerSave mode when pin F1 is connected to VCC and the M752 is in sleep mode (see Sleep Mode section
above).
Since PowerSave mode isolates the address, data and control signals, the device will wake-up by:
■ a receive data start bit transition (HIGH to LOW)
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
The M752 will return to the PowerSave mode automatically after a read to the MSR (to reset the modem
inputs) and all interrupting conditions have been serviced and cleared. The 2751 will stay in the PowerSave
mode of operation until it is disabled by setting IER bit-4 to a logic 0 and/or the PowerSave pin is connected to
GND.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. Also, it is important to keep
RX A/B inputs idling HIGH or “marking” condition during sleep mode to avoid receiving a “break” condition
upon the restart. This may occur when the external interface transceivers (RS-232, RS-485 or another type)
are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the designer can use a
47k-100k ohm pull-up resistor on the RXA and RXB pins.
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