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參數(shù)資料
| 型號： | XR19L402IL48-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 9/49頁 |
| 文件大小： | 0K |
| 描述： | IC UART/TXRX RS485 48QFN |
| 標準包裝： | 260 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 64 字節(jié) |
| 規(guī)程： | RS485 |
| 電源電壓： | 3.3V，5V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-QFN-EP（7x7） |
| 包裝： | 托盤 |
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XR19L402
17
REV. 1.0.3
TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
2.13
Sleep Mode, ACP Mode and Power-Save Feature with Wake-Up Interrupt
2.13.1
UART sleep mode (3.3V or 5V operation)
The UART portion in the L402 can enter sleep mode if all of these conditions are satisfied:
■ no interrupts pending (ISR bit-0 = 1)
■ the 16-bit divisor programmed in DLM and DLL registers is a non-zero value
■ sleep mode is enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pins are idle
The L402 stops its crystal oscillator to conserve power in this mode. The user can check the XTAL2 pin for no
clock output as an indication that the device has entered the partial sleep mode.
The UART portion in the L402resumes normal operation or active mode by any of the following:
■ a receive data start bit transition on the RX inputs
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: i.e., any of the MSR bits 0-
3 shows a ’1’ (in internal loopback mode)
If the sleep mode is enabled and the L402 is awakened by one of the conditions described above, an interrupt
is issued by the L402 to signal to the CPU that it is awake. The lower nibble of the interrupt source register
(ISR) will read a value of 0x1 for this interrupt and reading the ISR clears this interrupt. Since the same value
(0x1) is also used to indicate no pending interrupt, users should exercise caution while using the sleep mode.
The UART portion in the L402 will return to the sleep mode automatically after all interrupting conditions have
been serviced and cleared. If the UART portion of the L402 is awakened by the modem inputs, a read to the
MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while an interrupt
is pending. The UART portion of the L402 will stay in the sleep mode of operation until it is disabled by setting
IER bit-4 to a logic 0.
2.13.1.1
Receiving data in UART sleep mode
There is a start-up delay for the crystal oscillator after waking up from sleep mode, therefore the first few
receive characters may be lost. The number of characters lost during the restart also depends on your
operating data rate. More characters are lost when operating at higher data rate. If an external oscillator is
used, any data received will be transferred to/from the UART without any issues.
2.13.2
UART active, Charge pump of RS-485 transceiver shut down (3.3V operation only)
If the ACP pin is HIGH and the UART portion of the L402 is not in sleep mode, then the charge pump will
automatically shut down to conserve power if the following conditions are true:
■ no activity on the TX output signals
■ modem inputs have been idle for approximately 30 seconds
When these conditions are satisfied, the L402 shuts down the charge pump and tri-states the RS-485 drivers
to conserve power. In this mode, the RS-485 receivers are fully active and the internal registers of the L402
can be accessed. The time for the charge pump to resume normal operation after exiting the sleep mode is
typically 45
s. It will wake up by any of the following:
■ a receive data start bit transition on the RX input (LOW to HIGH)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a LOW to HIGH transition on any of the modem or general purpose serial inputs
Because the receivers are fully active when the charge pump is turned off, any data received will be transferred
to/from the UART without any issues.
2.13.2.1
Transmitting data in ACP Mode
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