REV. 1.0.3 SERIAL I/O INTERFACE (RS-485/RS-485 Voltage Levels) TXA+ TXA- 38 36 O " />
參數(shù)資料
型號(hào)： XR19L402IL48-F
廠商： Exar Corporation
文件頁(yè)數(shù)： 34/49頁(yè)
文件大?。?/td> 0K
描述： IC UART/TXRX RS485 48QFN
標(biāo)準(zhǔn)包裝： 260
特點(diǎn)： *
通道數(shù)： 2，DUART
FIFO's： 64 字節(jié)
規(guī)程： RS485
電源電壓： 3.3V，5V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
帶CMOS： 是
安裝類(lèi)型： 表面貼裝
封裝/外殼： 48-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 48-QFN-EP（7x7）
包裝： 托盤(pán)
XR19L402
4
TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
REV. 1.0.3
SERIAL I/O INTERFACE (RS-485/RS-485 Voltage Levels)
TXA+
TXA-
38
36
O
Differential UART Channel A Transmit Data.
RXA+
RXA-
34
33
I
Differential UART Channel A Receive Data.
TXB+
TXB-
23
25
O
Differential UART Channel B Transmit Data.
RXB+
RXB-
27
28
I
Differential UART Channel B Receive Data.
SERIAL I/O INTERFACE (CMOS/TTL Voltage Levels)
TXB
17
O
UART Channel B Transmit Data. This pin can be used to communicate with external IR or
RS-485 transceiver.
RXB
43
I
UART Channel B Receive Data. This pin can be used to communicate with external IR or
RS-485 transceiver.
ANCILLARY SIGNALS (CMOS/TTL Voltage Levels)
HALF/
FULLA#
41
I
When HALF/FULLA# is HIGH, half-duplex mode is enabled for channel A.
When HALF/FULLA# is LOW, full-duplex mode is enabled for channel A.
HALF/
FULLB#
40
I
When HALF/FULLB# is HIGH, half-duplex mode is enabled for channel B.
When HALF/FULLB# is LOW, full-duplex mode is enabled for channel B.
TEST_EN
42
I
For factory test mode only. For normal operation, connect to GND.
XTAL1
13
I
Crystal or external clock input.
XTAL2
14
O
Crystal or buffered clock output.
PwrSave
12
I
Power-Save (active high). This feature isolates the L402’s data bus interface from the host
preventing other bus activities that cause higher power drain during sleep mode.
ACP
20
I
Autosleep for Charge Pump (active HIGH). When this pin is HIGH, the charge pump is shut
off if the UART is already in sleep mode, i.e. the XTAL2 output is LOW.
I/M#
18
I
Intel or Motorola Bus Select.
When I/M# pin is HIGH, 16 or Intel Mode, the device will operate in the Intel bus type of
interface.
When I/M# pin is LOW, 68 or Motorola mode, the device will operate in the Motorola bus
type of interface.
RESET
(RESET#)
19
I
When I/M# pin is HIGH for Intel bus interface, this input becomes RESET (active high).
When I/M# pin is LOW for Motorola bus interface, this input becomes RESET# (active low).
A 40 ns minimum active pulse on this pin will reset the internal registers and all outputs of
the UART. The UART transmitter output will be held HIGH, the receiver input will be ignored
and outputs are reset during reset period.
C1+
C1-
31
30
-
Charge pump capacitors. As shown in
Figure 1, a 0.22 uF capacitor should be placed
between these 2 pins.
R_EN
21
I
When the supply voltage is < 3.6V, connect R_EN to GND.
When the supply voltage is > 3.6V, connect R_EN to VCC.
Pin Descriptions
NAME
48-QFN
PIN#
TYPE
DESCRIPTION
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