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參數(shù)資料
| 型號(hào)： | XR19L402IL48-0B-EB |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 48/49頁 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR XR19L402-B 48QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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XR19L402
8
TWO CHANNEL INTEGRATED UART AND RS-485 TRANSCEIVER
REV. 1.0.3
2.2
5-Volt Tolerant Inputs
The CMOS/TTL level inputs of the L402 can accept up to 5V inputs when operating at 3.3V. Note that the
XTAL1 pin is not 5V tolerant when an external clock supply is used.
2.3
Device Hardware Reset
The RESET or RESET# input resets the internal registers and the serial interface outputs in both channels to
their default state (see Table 16). An active pulse of longer than 40 ns duration will be required to activate the
reset function in the device.
2.4
Device Identification and Revision
The XR19L402 provides a Device Identification code and a Device Revision code to distinguish the part from
other devices and revisions. To read the identification code from the part, it is required to set the baud rate
generator registers DLL and DLM both to 0x00. Now reading the content of the DLM will provide 0x0A and
reading the content of DLL will provide the revision of the part; for example, a reading of 0x01 means revision
A.
2.5
Channel A and B Selection
The XR19L402 provides the user with the capability to bi-directionally transfer information between an external
CPU and an external serial communication device. During Intel Bus Mode (I/M# pin connected to VCC), a
LOW on chip select pins, CSA# or CSB#, allows the user to select UART channel A or B to configure, send
transmit data and/or unload receive data to/from the UART. Selecting both UARTs can be useful during power
up initialization to write to the same internal registers, but do not attempt to read from both UARTs
simultaneously. Individual channel select functions are shown in Table 1.
TABLE 1: CHANNEL A AND B SELECT IN 16 MODE
FUNCTION
1
UART de-selected
0
1
Channel A selected
1
0
Channel B selected
0
Channel A and B selected
During Motorola Bus Mode (I/M# pin connected to GND), the package interface pins are configured for
connection with Motorola and other popular microprocessor bus types. In this mode the XR19L402 decodes an
additional address, A3, to select one of the UART ports. The A3 address decode function is used only when in
the Motorola Bus Mode. See Table 2.
TABLE 2: CHANNEL A AND B SELECT IN 68 MODE
FUNCTION
1
N/A
UART de-selected
0
Channel A selected
0
1
Channel B selected
2.6
Channel A and B Internal Registers
Each UART channel in the L402 has a set of enhanced registers for control, monitoring and data loading and
unloading. The configuration register set is compatible to those already available in the standard single
16C550. These registers function as data holding registers (THR/RHR), interrupt status and control registers
(ISR/IER), a FIFO control register (FCR), receive line status and control registers (LSR/LCR), modem status
CSA#
CSB#
CS#
A3
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