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參數(shù)資料
型號: XPC8240LVV200E
廠商: Freescale Semiconductor
文件頁數(shù): 33/52頁
文件大?。?/td> 0K
描述: IC MPU INTEGRATED 200MHZ 352TBGA
標(biāo)準(zhǔn)包裝: 24
系列: MPC82xx
處理器類型: 32-位 MPC82xx PowerQUICC II
速度: 200MHz
電壓: 2.5V
安裝類型: 表面貼裝
封裝/外殼: 352-LBGA
供應(yīng)商設(shè)備封裝: 352-TBGA(35x35)
包裝: 托盤
MPC8240 Integrated Processor Hardware Specifications
39
System Design Information
Figure 25. COP Connector Diagram
1.7.7
PCI Reference Voltage—LVDD
The MPC8240 PCI reference voltage (LVDD) pins should be connected to 3.3 ±0.3 V power supply if
interfacing the MPC8240 into a 3.3-V PCI bus system. Similarly, the LVDD pins should be connected to
5.0 ±5% V power supply if interfacing the MPC8240 into a 5-V PCI bus system. For either reference
HRESET
HRST_CPU
HRST_CTRL
From Target
Board Sources
HRESET
13
SRESET 5
NC
11
VDD_SENSE
6
5 2
15 3
1 k
10 k
10 k
10 k
OVDD
CHKSTOP_IN 6
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
12
(if any)
COP
He
a
d
e
r
14 4
Key
Notes:
1. QACK is an output on the MPC8240 and is not required at the COP header for emulation.
2. RUN/STOP normally found on pin 5 of the COP header is not implemented on the MPC8240.
Connect pin 5 of the COP header to OVDD with a 1-k pull-up resistor.
3. CKSTP_OUT normally found on pin 15 of the COP header is not implemented on the MPC8240.
Connect pin 15 of the COP header to OVDD with a 10-k pull-up resistor.
4. Pin 14 is not physically present on the COP header.
QACK 1
OVDD
10 k
OVDD
TRST
10 k
OVDD
10 k
10 k
5. SRESET functions as output SDMA12 in extended ROM mode.
6. CHKSTOP_IN functions as output SDMA14 in extended ROM mode.
MPC8240
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
No pin
COP Connector
Physical Pin Out
1
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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