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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WV3EG232M64STSU-D4
August 2006
Rev. 2
PRELIMINARY
White Electronic Designs Corp. reserves the right to change products or specications without notice.
DC CHARACTERISTICS FOR 403 SPEED GRADE
Parameter
Symbol
Min
Max
Unit
Note
Supply voltage DDR266/DDR333 (nominal VCC of 2.5V)
VCC
2.5
2.7
V
I/O Supply voltage DDR266/DDR333 (nominal VCC of 2.5V)
VCCQ
2.5
2.7
V
I/O Reference voltage
VREF
0.49*VCCQ
0.51*VCCQ
V1
I/O Termination voltage
VTT
VREF-0.04
VREF+0.04
V
2
Input logic high voltage
VIH(DC)
VREF+0.15
VCCQ+0.30
V
Input logic low voltage
VIL(DC)
-0.3
VREF-0.15
V
Input voltage level, CK and CK#
VIN(DC)
-0.3
VCCQ+0.30
V
Input differential voltage, CK and CK#
VID(DC)
0.3
VCCQ+0.60
V
3
Input crossing point voltage, CK and CK#
VIX(DC)
0.3
VCCQ+0.60
V
Input leakage current
Addr, CAS#,
RAS#, WE#
II
-16
16
μA
CS#, CKE
-8
8
μA
CK, CK#
-8
8
μA
DM
-4
4
μA
Output leakage current
IOZ
-10
10
μA
Output high current (normal strengh); VOUT = V +0.84V
IOH
-16.8
—
mA
Output high current (normal strengh); VOUT = VTT -0.84V
IOL
16.8
—
mA
Output high current (half strengh); VOUT = VTT +0.45V
IOH
-9
—
mA
Output high current (half strengh); VOUT = VTT -0.45V
IOL
9—
mA
NOTES:
1.
VREF is expected to be equal to 0.5*VCCQ of the transmitting device, and to track variations in the DC level of the same. Peak to peak noise on VREF may not exceed ±2% of the DC
value
2.
VTT is not applied directly to the device. VTT is a system supply for signal termination resistors,is expected to be set equal to VREF, and must track variations in the DC level of VREF
3.
VID is the magnitude of the difference between the input level on CK and the input level on CK#.
CAPACITANCE
TA = 25°C, f = 100MHz
Parameter
Symbol
Min
Max
Unit
Input Capacitance (A0-A12, BA0-BA1, RAS#, CAS#, WE#)
CIN1
20
28
pF
Input Capacitance (CKE0, CKE1)
CIN2
12
16
pF
Input Capacitance (CS0#, CS1#)
CIN3
12
16
pF
Input Capacitance (CK0, CK0#, CK1, CK1#)
CIN4
12
16
pF
Input Capacitance (DM0-DM7), (DQS0-DQS7)
CIN5
12
14
pF
Input Capacitance (DQ0-DQ63)
COUT1
12
14
pF
SAMSUNG & NANYA components.
AC OPERATING TEST CONDITIONS
Parameter/Condition
Symbol
Min
Max
Unit
Note
Input High (Logic 1) Voltage
VIH(AC)
VREF +0.31
V
1
Input Low (Logic 0) Voltage
VIL(AC)
VREF -0.31
V
1
Input Differential Voltage, CK and CK# inputs
VID(AC)
0.7
VCCQ+0.6
V
Input Crossing Point Voltage, CK and CK# inputs
VIX(AC)
0.5*VCCQ-0.2
0.5*VCCQ+0.2
V
NOTES:
1.
VIH overshoot: VIH = VCCQ +1.5V for a pulse width < 3ns and the pulse can not be greater than 1/3 of the cycle rate.
VIL undershoot: VIL = -1.5V for a pulse width < 3ns and the pulse can not be greater than 1/3 of the cycle rate.