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參數(shù)資料
| 型號： | WED9LC6416V2012BI |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA153 |
| 封裝： | MO-163, BGA-153 |
| 文件頁數(shù)： | 5/27頁 |
| 文件大小： | 334K |
| 代理商： | WED9LC6416V2012BI |
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White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
White Electronic Designs
WED9LC6416V
SDRAM CURRENT STATE TRUTH TABLE (CONT.)
Command
Current State SDCE SRAS SDCAS SDWE A12 & A13
A11-A0
Description
Action
Notes
(BA)
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
L
H
BA
Row Address
Bank Activate
ILLEGAL
Refreshing
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Idle after tRC
L
H
X
No Operation
No Operation; Idle after tRC
H
X
Device Deselect
No Operation; Idle after tRC
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
Mode Register
L
H
BA
Row Address
Bank Activate
ILLEGAL
Accessing
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
No Operation; Idle after two clock cycles
H
X
Device Deselect
No Operation; Idle after two clock cycles
NOTES:
1. Both Banks must be idle otherwise it is an illegal action.
2. The Current State refers only refers to one of the banks, if BA (A
12 and A13), selects this bank then the action is illegal. If BA (A12 and A13),
selects the bank
not being referenced by the Current State then the action may be legal depending on the state of that bank.
3. The minimum and maximum Active time (tRAS)must be satisfied.
4. The RAS to CAS Delay (tRCD)must occur before the command is given.
5. Address SDA
10 is used to determine if the Auto Precharge function is activated.
6. The command must satisfy any bus contention,bus turn around,and/or write recovery requirements.
The command is illegal if the minimum bank to bank delay time (tRRD) is not satisfied.
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