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參數(shù)資料
| 型號： | W19B322MTB9G |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PBGA48 |
| 封裝： | TFBGA-48 |
| 文件頁數(shù)： | 4/52頁 |
| 文件大?。?/td> | 1955K |
| 代理商： | W19B322MTB9G |
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W19B32XMT/B
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The first writing two unlock cycles initiate the autoselect command sequence. This is followed by a
third write cycle that contains the bank address and the autoselect command. The bank then enters
into the autoselect mode. The system may read at any address within the same bank without initiating
another autoselect command sequence:
A read cycle at address (BA)XX00h (where BA is
the bank address) returns the manufacturer code.
A read cycle at address (BA)XX01h in word mode
(or (BA)XX02h in byte mode) returns the device
code.
A read cycle to an address containing a sector ad
dress (SA) within the same bank, and the address
02h on A7-A0 in word mode (or the address 04h on A6-A-1 in byte mode) returns 01h if the
sector is protected, or 00h if it is unprotected.
To return to read mode (or erase-suspend-read mode if the bank was previously in Erase Suspend),
the system must write the reset command.
6.2.4 Enter Security Sector/Exit Security Sector Command Sequence
The Security Sector region provides a secured data area containing a random, sixteen-byte electronic
serial number (ESN). The system can access the Security Sector region by issuing the three-cycle
Enter Security Sector command sequence. The device continues to access the Security Sector region
until the system issues the four-cycle Exit Security Sector command sequence. The Exit Security
Sector command sequence returns the device to normal operation. See “Security Sector Flash
Memory Region” for further information.
6.2.5 Byte/Word Program Command Sequence
The device can be programmed either by word or byte, which depending on the state of the #BYTE
pin. Programming is a four-bus-cycle operation. The program command sequence is initiated by
writing two unlock write cycles, followed by the program setup command. The program address and
data are written next, which in turn initiate the Embedded Program algorithm. The device automatically
provides internally generated program pulses and verifies the programmed cell margin.
Once the Embedded Program algorithm is complete, the bank then returns to the read mode and
addresses are no longer latched. The system can determine the status of the program operation by
using DQ7, DQ6, or RY/#BY. Please refer to the Write Operation Status section for bits' information.
Any commands written to the device during the Embedded Program Algorithm are ignored. Please
note that a hardware reset will immediately stop the program operation. The program command
sequence should be reinitiated when the bank has returned to the read mode, in order to ensure data
integrity.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be programmed
from “0” back to “1.” If trying to do so may cause that bank to set DQ5 = 1, or cause the DQ7 and DQ6
status bits to indicate that the operation is successful. However, a succeeding read will show that the
data is still “0.” Only erase operations can change “0” to “1.”
6.2.6 Unlock Bypass Command Sequence
The unlock bypass feature provides the system to program bytes or words to a bank which is faster
than using the standard program command sequence. The unlock bypass command sequence is
initiated by first writing two unlock cycles. And a third write cycle containing the unlock bypass
command, 20h, is followed. Then, the bank enters into the unlock bypass mode. A two-cycle unlock
bypass program command sequence is all that required to program in this mode. The first cycle in this
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