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| 型號(hào)： | VNC2-64Q1B-TRAY |
| 廠商： | FTDI, Future Technology Devices International Ltd |
| 文件頁(yè)數(shù)： | 53/88頁(yè) |
| 文件大小： | 0K |
| 描述： | IC USB HOST/DEVICE CTRL 64-QFN |
| 應(yīng)用說(shuō)明： | Vinculum-II IO Cell Description AppNote Vinculum-II Debug Interface Description AppNote Vinculum-II IO Mux Explained AppNote Vinculum-II PWM Example AppNote Migrating Vinculum Designs AppNote |
| 標(biāo)準(zhǔn)包裝： | 260 |
| 系列： | Vinculum-II |
| 控制器類(lèi)型： | USB 2.0 控制器 |
| 接口： | USB，主機(jī)/設(shè)備配置，UART，SPI，PWM，閃存 256K，DMA 4CH |
| 電源電壓： | 1.62 V ~ 1.98 V |
| 電流 - 電源： | 25mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 64-QFN（8x8） |
| 包裝： | 托盤(pán) |
| 其它名稱(chēng)： | VNC2-64Q1A-TRAY VNC2-64Q1A-TRAY-ND |
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57
Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
6.6 Parallel FIFO – Asynchronous Mode
Parallel FIFO Asynchronous mode known as 245, is functionally the same as the one that is present in
VNC1L has an eight bit data bus, individual read and write strobes and two hardware flow control signals.
6.6.1 FIFO Signal Descriptions
The Parallel FIFO interface signals are described in Table 6.16 They can be programmed to a choice of
I/O pins depending on the package size. Further details on the configuration of input and output signals
are available in Section 5 - I/O Multiplexer.
64 Pin
Package
Available
pins
48 Pin
Package
Available
pins
32 Pin
Package
Available
pins
Name
Type
Description
11, 15,
19, 24,
28, 39,
43, 47,
51, 57,
61
11, 15,
20, 31,
35, 41,
45
11, 23
29
fifo_data[0]
I/O
FIFO Data Bus Bit 0
12, 16,
20, 25,
29, 40,
44, 48,
52, 58,
62
12,16,
21, 32,
36, 42,
46
12, 24,
30
fifo_data[1]
I/O
FIFO Data Bus Bit 1
13, 17,
22, 26,
31, 41,
45, 49,
55, 59,
63
13, 18,
22, 33,
37, 43,
47
14, 25,
31
fifo_data[2]
I/O
FIFO Data Bus Bit 2
14, 18,
23, 27,
32, 42,
46, 50,
56, 60,
64
14, 19,
23, 34,
38, 44,
48
15, 26,
32
fifo_data[3]
I/O
FIFO Data Bus Bit 3
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