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| 型號： | VNC2-64Q1B-TRAY |
| 廠商： | FTDI, Future Technology Devices International Ltd |
| 文件頁數(shù)： | 16/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC USB HOST/DEVICE CTRL 64-QFN |
| 應用說明： | Vinculum-II IO Cell Description AppNote Vinculum-II Debug Interface Description AppNote Vinculum-II IO Mux Explained AppNote Vinculum-II PWM Example AppNote Migrating Vinculum Designs AppNote |
| 標準包裝： | 260 |
| 系列： | Vinculum-II |
| 控制器類型： | USB 2.0 控制器 |
| 接口： | USB，主機/設備配置，UART，SPI，PWM，閃存 256K，DMA 4CH |
| 電源電壓： | 1.62 V ~ 1.98 V |
| 電流 - 電源： | 25mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 64-QFN（8x8） |
| 包裝： | 托盤 |
| 其它名稱： | VNC2-64Q1A-TRAY VNC2-64Q1A-TRAY-ND |
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Copyright 2009-2011 Future Technology Devices International Limited
Datasheet
Vinculum-II Embedded Dual USB Host Controller IC
Version 1.5
Document No.: FT_000138 Clearance No.: FTDI# 143
4.2.5 Peripheral DMA Modules 0, 1, 2 & 3
The peripheral DMA has the capability to transfer data to and from an I/O device. The CPU can offload
the transfer of data between the processor and the peripheral freeing the CPU to execute other
instructions.
The DMA module collects or transmits data from memory to an I/O address space, it is also capable of
copying data in memory and transferring it to another location.
The DMA is not accessible by the user as it automatically controlled by the CPU.
4.2.6 RAM Module
The RAM module consists of 16k bytes on-chip (4k x 32-bits) data memory. The RAM is byte addressable.
4.2.7 Peripheral Interface Modules
VNC2 has nine peripheral interface modules. Full descriptions of each module are described in section 6.
Debugger Interface
UART
PWM
FIFO
SPI Master
SPI Slave 0 & 1
GPIO - General purpose I/O pins
General purpose timers
4.2.8 USB Transceivers 0 and 1
Two USB transceiver cells provide the physical USB device interface supporting USB 1.1 and USB 2.0
standards. Low-speed and full-speed USB data rates are supported. Each output driver provides +3.3V
level slew rate control signalling, whilst a differential receiver and two single ended receivers provide USB
DATA IN, SE0 and USB Reset condition detection. These cells also include integrated internal USB pull-up
or pull-down resistors as required for host or slave mode.
4.2.9 USB Host / Device Controllers
These blocks handle the parallel-to-serial and serial-to-parallel conversion of the USB physical layer. This
includes bit stuffing, CRC generation, USB frame generation and protocol error checking. The Host /
Device controller is autonomous and therefore requires limited load from the CPU.
4.2.10 12MHz Oscillator
The 12MHz Oscillator cell generates a 12MHz reference clock input to the Clock Multiplier PLL from an
external 12MHz crystal. The external crystal is connected across Pin 4 – XTIN and Pin 5 – XTOUT in the
configuration shown in Figure 10.1.
4.2.11 Power Saving Modes and Standby mode.
VNC2 can be set to operate in three frequencies allowing the user to select a slower speed to reduce
power consumption. Three operating frequencies available are 12MHz, 24MHz and normal operation of
48MHz. These operating modes can be configured using the RTOS. Full details are available in the RTOS
manual available from the FTDI website.
When a particular peripheral is not used, it is powered down internally thus saving power.
Standby mode is available under firmware control, this mode puts the VNC2 in a state with no clocks
running or system blocks powered. The device will wake up out of this mode by toggling any of the
following signals: USB0/1 DP or DM, SPI slave 0 select (spi_s0_ss# ), SPI slave 1select(spi_s1_ss# ) or
UART ring indicator (uart_ri#).
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