參數(shù)資料
型號: UPD78F0547GC(T)-UBT-A
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, LEAD FREE, PLASTIC, LQFP-80
文件頁數(shù): 64/96頁
文件大小: 4109K
代理商: UPD78F0547GC(T)-UBT-A
Preliminary Product Information U14673EJ1V0PM00
67
PD789322,789324,789326,789327
7.2 Standby Function Control Register
The oscillation stabilization time selection register (OSTS) is used to control the wait time from the time STOP
mode is released by an interrupt request until oscillation stabilizes.
OSTS is set using an 8-bit memory manipulation instruction.
RESET input sets this register to 04H. Note that the time required for oscillation to stabilize after RESET input or
the release of STOP mode by POC will be taken as the time selected by mask option (2
15/fX, or 217/fX) (refer to 9.
MASK OPTION for mask option details) .
Figure 7-1. Format of Oscillation Stabilization Time Selection Register
Symbol
7
6
5
4
3
2
1
0
Address
After reset
R/W
OSTS
0
OSTS2
OSTS1
OSTS0
FFFAH
04H
R/W
OSTS2
OSTS1
OSTS0
Oscillation stabilization time selection
00
0
2
12
/fX (819
s)
01
0
2
15
/fX (6.55 ms)
10
0
2
17
/fX (26.2 ms)
Other than above
Setting prohibited
Caution
The wait time required after releasing STOP mode does not include the time (“a” in the following
figure) required for the clock oscillation to restart after STOP mode is released, regardless of
whether STOP mode is released by RESET input or interrupt.
STOP mode release
X1 pin voltage
waveform
VSS
a
Remarks 1. fX: Main system clock oscillation frequency
2. The parenthesized values apply to operation at fX = 5.0 MHz.
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