
User’s Manual U11919EJ4V0UD
15
LIST OF FIGURES (1/3)
Figure No.
Title
Page
2-1
Pin I/O Circuits ...........................................................................................................................................35
3-1
Memory Map (
PD789022)........................................................................................................................36
3-2
Memory Map (
PD789024)........................................................................................................................37
3-3
Memory Map (
PD789025)........................................................................................................................38
3-4
Memory Map (
PD789026)........................................................................................................................39
3-5
Memory Map (
PD78F9026A) ...................................................................................................................40
3-6
Data Memory Addressing (
PD789022) ....................................................................................................43
3-7
Data Memory Addressing (
PD789024) ....................................................................................................44
3-8
Data Memory Addressing (
PD789025) ....................................................................................................45
3-9
Data Memory Addressing (
PD789026) ....................................................................................................46
3-10
Data Memory Addressing (
PD78F9026A)................................................................................................47
3-11
Program Counter Configuration .................................................................................................................48
3-12
Program Status Word Configuration ..........................................................................................................48
3-13
Stack Pointer Configuration .......................................................................................................................50
3-14
Data to Be Saved to Stack Memory ...........................................................................................................50
3-15
Data to Be Restored from Stack Memory ..................................................................................................50
3-16
General-Purpose Register Configuration ...................................................................................................51
4-1
Port Types..................................................................................................................................................64
4-2
Block Diagram of P00 to P07 .....................................................................................................................66
4-3
Block Diagram of P10 to P17 .....................................................................................................................67
4-4
Block Diagram of P20 ................................................................................................................................68
4-5
Block Diagram of P21 ................................................................................................................................69
4-6
Block Diagram of P22 ................................................................................................................................70
4-7
Block Diagram of P30 to P32 .....................................................................................................................71
4-8
Block Diagram of P40 to P47 .....................................................................................................................72
4-9
Block Diagram of P50 ................................................................................................................................73
4-10
Block Diagram of P51 ................................................................................................................................74
4-11
Block Diagram of P52 and P53 ..................................................................................................................75
4-12
Format of Port Mode Register....................................................................................................................77
4-13
Format of Pull-Up Resistor Option Register...............................................................................................77
5-1
Block Diagram of Clock Generator.............................................................................................................79
5-2
Format of Processor Clock Control Register..............................................................................................80
5-3
External Circuit of System Clock Oscillator................................................................................................81
5-4
Examples of Incorrect Resonator Connection ..........................................................................................82
5-5
Switching CPU Clock .................................................................................................................................85
6-1
Block Diagram of 16-Bit Timer 20 ..............................................................................................................87