
Preliminary User’s Manual U16228EJ1V0UD
17
LIST OF FIGURES (2/9)
Figure No.
Title
Page
4-15
Block Diagram of P40 to P43 ....................................................................................................................... 110
4-16
Block Diagram of P50 to P53 ....................................................................................................................... 111
4-17
Block Diagram of P60 to P63 ....................................................................................................................... 112
4-18
Block Diagram of P70 to P77 ....................................................................................................................... 113
4-19
Block Diagram of P120 ................................................................................................................................ 114
4-20
Block Diagram of P130 ................................................................................................................................ 115
4-21
Block Diagram of P140 and P141 ................................................................................................................ 116
4-22
Format of Port Mode Register ...................................................................................................................... 117
4-23
Format of Pull-up Resistor Option Register.................................................................................................. 119
4-24
Format of Input Switch Control Register (ISC) ............................................................................................. 120
5-1
Block Diagram of Clock Generator............................................................................................................... 123
5-2
Subsystem Clock Feedback Resistor........................................................................................................... 124
5-3
Format of Processor Clock Control Register (PCC) ..................................................................................... 125
5-4
Format of Ring-OSC Mode Register (RCM)................................................................................................. 126
5-5
Format of Main Clock Mode Register (MCM) ............................................................................................... 127
5-6
Format of Main OSC Control Register (MOC).............................................................................................. 128
5-7
Format of Oscillation Stabilization Time Counter Status Register (OSTC)................................................... 128
5-8
Format of Oscillation Stabilization Time Select Register (OSTS)................................................................. 129
5-9
External Circuit of X1 Oscillator.................................................................................................................... 130
5-10
External Circuit of Subsystem Clock Oscillator ............................................................................................ 130
5-11
Examples of Incorrect Resonator Connection .............................................................................................. 131
5-12
Timing Diagram of CPU Default Start Using Ring-OSC ............................................................................... 134
5-13
Status Transition Diagram............................................................................................................................ 135
5-14
Switching from Ring-OSC Clock to X1 Input Clock (Flowchart) ................................................................... 142
5-15
Switching from X1 Input Clock to Ring-OSC Clock (Flowchart) ................................................................... 143
5-16
Switching from X1 Input Clock to Subsystem Clock (Flowchart) .................................................................. 144
5-17
Switching from Subsystem Clock to X1 Input Clock (Flowchart) .................................................................. 145
6-1
Block Diagram of 16-Bit Timer/Event Counter 00......................................................................................... 148
6-2
Block Diagram of 16-Bit Timer/Event Counter 01......................................................................................... 149
6-3
Format of 16-Bit Timer Mode Control Register 00 (TMC00)......................................................................... 153
6-4
Format of 16-Bit Timer Mode Control Register 01 (TMC01)......................................................................... 154
6-5
Format of Capture/Compare Control Register 00 (CRC00).......................................................................... 155
6-6
Format of Capture/Compare Control Register 01 (CRC01).......................................................................... 156
6-7
Format of 16-Bit Timer Output Control Register 00 (TOC00) ....................................................................... 157
6-8
Format of 16-Bit Timer Output Control Register 01 (TOC01) ....................................................................... 158
6-9
Format of Prescaler Mode Register 00 (PRM00) ......................................................................................... 160