
358
SAM G51 [DATASHEET]
11209C–ATARM–20-Dec-13
16.5.6 Supply Controller Status Register
Name:
SUPC_SR
Address:
0x400E1424
Access:
Read-only
Note:
Because of the asynchronism between the slow clock (SCLK) and the system clock (MCK), the status register flag
reset is taken into account only two slow clock cycles after the read of the SUPC_SR.
BODRSTS: Brownout Detector Reset Status
0 (NO): No core brownout rising edge event has been detected since the last read of the SUPC_SR.
1 (PRESENT): At least one brownout output rising edge event has been detected since the last read of the SUPC_SR.
When the voltage remains below the defined threshold, there is no rising edge event at the output of the brownout detection cell.
The rising edge event occurs only when there is a voltage transition below the threshold.
SMRSTS: Supply Monitor Reset Status
0 (NO): No supply monitor detection has generated a core reset since the last read of the SUPC_SR.
1 (PRESENT): At least one supply monitor detection has generated a core reset since the last read of the SUPC_SR.
SMS: Supply Monitor Status
0 (NO): No supply monitor detection since the last read of SUPC_SR.
1 (PRESENT): At least one supply monitor detection since the last read of SUPC_SR.
SMOS: Supply Monitor Output Status
0 (HIGH): The supply monitor detected VDDIO higher than its threshold at its last measurement.
1 (LOW): The supply monitor detected VDDIO lower than its threshold at its last measurement.
OSCSEL: 32-kHz Oscillator Selection Status
0 (RC): The slow clock, SLCK is generated by the embedded 32 kHz RC oscillator.
1 (CRYST): The slow clock, SLCK is generated by the 32 kHz crystal oscillator.
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OSCSEL
SMOS
SMS
SMRSTS
BODRSTS
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