參數(shù)資料
型號(hào): UPD72042BGT
廠商: NEC Corp.
英文描述: LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
中文描述: LSI器件間設(shè)備BusTM(IEBusTM)協(xié)議控制
文件頁(yè)數(shù): 7/92頁(yè)
文件大?。?/td> 541K
代理商: UPD72042BGT
μ
PD72042A, 72042B
7
DATA SHEET S13990EJ2V0DS00
Pin No.
14
15
16
Pin
RESET
TEST
V
DD
I/O
Input
Input
Function
Serial reset signal input pin. A low input causes
a reset. Whenever the power is turned on, a
low-level signal must be applied to this pin.
During normal operation, a high level is applied.
IC test pin. When used, this pin must be tied to
the V
DD
pin directly.
Main power supply input pin
When reset
[for both hardware
and software]
Input
I/O format
CMOS input
CMOS input
相關(guān)PDF資料
PDF描述
UPD72042A LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
UPD72042AGT LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
UPD72042B LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL
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