參數(shù)資料
型號(hào): UPD45128163G5-A80L-9JF
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 128M-bit Synchronous DRAM 4-bank, LVTTL
中文描述: 8M X 16 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: PLASTIC, TSOP2-54
文件頁數(shù): 85/92頁
文件大?。?/td> 682K
代理商: UPD45128163G5-A80L-9JF
Data Sheet E0031N30
85
μ
PD45128441, 45128841, 45128163
14. Package Drawing
NOTES
1. Each lead centerline is located within 0.13 mm of
its true position (T.P.) at maximum material condition.
2. Dimension "A" does not include mold fiash, protrusions or gate
burrs. Mold flash, protrusions or gate burrs shall not exceed
0.15 mm per side.
M
P
A
G
C
N
B
M
D
L
K
J
H
I
E
F
detail of lead end
S
54
28
1
27
S
ITEM
A
B
C
I
J
L
M
N
54-PIN PLASTIC TSOP (
II
) (10.16 mm (400))
D
E
F
G
H
P
MILLIMETERS
22.22
±
0.05
0.80 (T.P.)
+
0.08
0.91 MAX.
0.13
0.10
3
°+
7
°
3
°
S54G5-80-9JF-2
0.50
±
0.10
10.16
±
0.10
0.80
±
0.20
0.145
+
0.025
0.10
±
0.05
1.1
±
0.1
1.00
0.32
11.76
±
0.20
K
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